Revert of MIPS: Add float instructions and test coverage, part one

src/mips64/constants-mips64.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef  V8_MIPS_CONSTANTS_H_
 #define  V8_MIPS_CONSTANTS_H_
 
 // UNIMPLEMENTED_ macro for MIPS.
 #ifdef DEBUG
 #define UNIMPLEMENTED_MIPS()                                                  \
@@ skipping 452 matching lines @@
   DMTC1 = ((0 << 3) + 5) << 21,
   CTC1 = ((0 << 3) + 6) << 21,
   MTHC1 = ((0 << 3) + 7) << 21,
   BC1 = ((1 << 3) + 0) << 21,
   S = ((2 << 3) + 0) << 21,
   D = ((2 << 3) + 1) << 21,
   W = ((2 << 3) + 4) << 21,
   L = ((2 << 3) + 5) << 21,
   PS = ((2 << 3) + 6) << 21,
   // COP1 Encoding of Function Field When rs=S.
-  ADD_S = ((0 << 3) + 0),
-  SUB_S = ((0 << 3) + 1),
-  MUL_S = ((0 << 3) + 2),
-  DIV_S = ((0 << 3) + 3),
-  ABS_S = ((0 << 3) + 5),
-  SQRT_S = ((0 << 3) + 4),
-  MOV_S = ((0 << 3) + 6),
-  NEG_S = ((0 << 3) + 7),
   ROUND_L_S = ((1 << 3) + 0),
   TRUNC_L_S = ((1 << 3) + 1),
   CEIL_L_S = ((1 << 3) + 2),
   FLOOR_L_S = ((1 << 3) + 3),
   ROUND_W_S = ((1 << 3) + 4),
   TRUNC_W_S = ((1 << 3) + 5),
   CEIL_W_S = ((1 << 3) + 6),
   FLOOR_W_S = ((1 << 3) + 7),
-  RECIP_S = ((2 << 3) + 5),
-  RSQRT_S = ((2 << 3) + 6),
   CVT_D_S = ((4 << 3) + 1),
   CVT_W_S = ((4 << 3) + 4),
   CVT_L_S = ((4 << 3) + 5),
   CVT_PS_S = ((4 << 3) + 6),
   // COP1 Encoding of Function Field When rs=D.
   ADD_D = ((0 << 3) + 0),
   SUB_D = ((0 << 3) + 1),
   MUL_D = ((0 << 3) + 2),
   DIV_D = ((0 << 3) + 3),
   SQRT_D = ((0 << 3) + 4),
   ABS_D = ((0 << 3) + 5),
   MOV_D = ((0 << 3) + 6),
   NEG_D = ((0 << 3) + 7),
   ROUND_L_D = ((1 << 3) + 0),
   TRUNC_L_D = ((1 << 3) + 1),
   CEIL_L_D = ((1 << 3) + 2),
   FLOOR_L_D = ((1 << 3) + 3),
   ROUND_W_D = ((1 << 3) + 4),
   TRUNC_W_D = ((1 << 3) + 5),
   CEIL_W_D = ((1 << 3) + 6),
   FLOOR_W_D = ((1 << 3) + 7),
-  RECIP_D = ((2 << 3) + 5),
-  RSQRT_D = ((2 << 3) + 6),
+  MIN = ((3 << 3) + 4),
+  MINA = ((3 << 3) + 5),
+  MAX = ((3 << 3) + 6),
+  MAXA = ((3 << 3) + 7),
   CVT_S_D = ((4 << 3) + 0),
   CVT_W_D = ((4 << 3) + 4),
   CVT_L_D = ((4 << 3) + 5),
   C_F_D = ((6 << 3) + 0),
   C_UN_D = ((6 << 3) + 1),
   C_EQ_D = ((6 << 3) + 2),
   C_UEQ_D = ((6 << 3) + 3),
   C_OLT_D = ((6 << 3) + 4),
   C_ULT_D = ((6 << 3) + 5),
   C_OLE_D = ((6 << 3) + 6),
@@ skipping 33 matching lines @@
   CMP_OGT = ((2 << 3) + 7),  // Reserved, not implemented.
   CMP_SAT = ((3 << 3) + 0),  // Reserved, not implemented.
   CMP_SOR = ((3 << 3) + 1),
   CMP_SUNE = ((3 << 3) + 2),
   CMP_SNE = ((3 << 3) + 3),
   CMP_SUGE = ((3 << 3) + 4),  // Reserved, not implemented.
   CMP_SOGE = ((3 << 3) + 5),  // Reserved, not implemented.
   CMP_SUGT = ((3 << 3) + 6),  // Reserved, not implemented.
   CMP_SOGT = ((3 << 3) + 7),  // Reserved, not implemented.
 
-  MIN = ((3 << 3) + 4),
-  MINA = ((3 << 3) + 5),
-  MAX = ((3 << 3) + 6),
-  MAXA = ((3 << 3) + 7),
   SEL = ((2 << 3) + 0),
-  MOVF = ((2 << 3) + 1),      // Function field for MOVT.fmt and MOVF.fmt
-  MOVZ_C = ((2 << 3) + 2),    // COP1 on FPR registers.
-  MOVN_C = ((2 << 3) + 3),    // COP1 on FPR registers.
   SELEQZ_C = ((2 << 3) + 4),  // COP1 on FPR registers.
   SELNEZ_C = ((2 << 3) + 7),  // COP1 on FPR registers.
 
   // COP1 Encoding of Function Field When rs=PS.
   // COP1X Encoding of Function Field.
   MADD_D = ((4 << 3) + 1),
 
   NULLSF = 0
 };
 
@@ skipping 409 matching lines @@
 // TODO(plind): below should be based on kPointerSize
 // TODO(plind): find all usages and remove the needless instructions for n64.
 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2;
 
 const int kInvalidStackOffset = -1;
 const int kBranchReturnOffset = 2 * Instruction::kInstrSize;
 
 } }   // namespace v8::internal
 
 #endif    // #ifndef V8_MIPS_CONSTANTS_H_