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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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171 int32_t get_fpu_register_word(int fpureg) const; | 171 int32_t get_fpu_register_word(int fpureg) const; |
172 int32_t get_fpu_register_signed_word(int fpureg) const; | 172 int32_t get_fpu_register_signed_word(int fpureg) const; |
173 int32_t get_fpu_register_hi_word(int fpureg) const; | 173 int32_t get_fpu_register_hi_word(int fpureg) const; |
174 float get_fpu_register_float(int fpureg) const; | 174 float get_fpu_register_float(int fpureg) const; |
175 double get_fpu_register_double(int fpureg) const; | 175 double get_fpu_register_double(int fpureg) const; |
176 void set_fcsr_bit(uint32_t cc, bool value); | 176 void set_fcsr_bit(uint32_t cc, bool value); |
177 bool test_fcsr_bit(uint32_t cc); | 177 bool test_fcsr_bit(uint32_t cc); |
178 void set_fcsr_rounding_mode(FPURoundingMode mode); | 178 void set_fcsr_rounding_mode(FPURoundingMode mode); |
179 unsigned int get_fcsr_rounding_mode(); | 179 unsigned int get_fcsr_rounding_mode(); |
180 bool set_fcsr_round_error(double original, double rounded); | 180 bool set_fcsr_round_error(double original, double rounded); |
181 bool set_fcsr_round_error(float original, float rounded); | |
182 bool set_fcsr_round64_error(double original, double rounded); | |
183 bool set_fcsr_round64_error(float original, float rounded); | |
184 void round_according_to_fcsr(double toRound, double& rounded, | 181 void round_according_to_fcsr(double toRound, double& rounded, |
185 int32_t& rounded_int, double fs); | 182 int32_t& rounded_int, double fs); |
186 // Special case of set_register and get_register to access the raw PC value. | 183 // Special case of set_register and get_register to access the raw PC value. |
187 void set_pc(int32_t value); | 184 void set_pc(int32_t value); |
188 int32_t get_pc() const; | 185 int32_t get_pc() const; |
189 | 186 |
190 Address get_sp() { | 187 Address get_sp() { |
191 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp))); | 188 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp))); |
192 } | 189 } |
193 | 190 |
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460 | 457 |
461 static inline void UnregisterCTryCatch() { | 458 static inline void UnregisterCTryCatch() { |
462 Simulator::current(Isolate::Current())->PopAddress(); | 459 Simulator::current(Isolate::Current())->PopAddress(); |
463 } | 460 } |
464 }; | 461 }; |
465 | 462 |
466 } } // namespace v8::internal | 463 } } // namespace v8::internal |
467 | 464 |
468 #endif // !defined(USE_SIMULATOR) | 465 #endif // !defined(USE_SIMULATOR) |
469 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 466 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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