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1 ; Simple test of signed and unsigned integer conversions. | 1 ; Simple test of signed and unsigned integer conversions. |
2 | 2 |
3 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
| 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 6 |
| 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 8 ; RUN: --target x8632 -i %s --args -Om1 \ |
| 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 10 |
| 11 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
| 12 ; once enough infrastructure is in. Also, switch to --filetype=obj |
| 13 ; when possible. |
| 14 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ |
| 15 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
| 16 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s |
| 17 |
| 18 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ |
| 19 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
| 20 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s |
5 | 21 |
6 @i8v = internal global [1 x i8] zeroinitializer, align 1 | 22 @i8v = internal global [1 x i8] zeroinitializer, align 1 |
7 @i16v = internal global [2 x i8] zeroinitializer, align 2 | 23 @i16v = internal global [2 x i8] zeroinitializer, align 2 |
8 @i32v = internal global [4 x i8] zeroinitializer, align 4 | 24 @i32v = internal global [4 x i8] zeroinitializer, align 4 |
9 @i64v = internal global [8 x i8] zeroinitializer, align 8 | 25 @i64v = internal global [8 x i8] zeroinitializer, align 8 |
10 @u8v = internal global [1 x i8] zeroinitializer, align 1 | 26 @u8v = internal global [1 x i8] zeroinitializer, align 1 |
11 @u16v = internal global [2 x i8] zeroinitializer, align 2 | 27 @u16v = internal global [2 x i8] zeroinitializer, align 2 |
12 @u32v = internal global [4 x i8] zeroinitializer, align 4 | 28 @u32v = internal global [4 x i8] zeroinitializer, align 4 |
13 @u64v = internal global [8 x i8] zeroinitializer, align 8 | 29 @u64v = internal global [8 x i8] zeroinitializer, align 8 |
14 | 30 |
(...skipping 16 matching lines...) Expand all Loading... |
31 ; CHECK: mov {{.*}},BYTE PTR | 47 ; CHECK: mov {{.*}},BYTE PTR |
32 ; CHECK: movsx e{{.*}},{{[a-d]l|BYTE PTR}} | 48 ; CHECK: movsx e{{.*}},{{[a-d]l|BYTE PTR}} |
33 ; CHECK: mov WORD PTR | 49 ; CHECK: mov WORD PTR |
34 ; CHECK: movsx | 50 ; CHECK: movsx |
35 ; CHECK: mov DWORD PTR | 51 ; CHECK: mov DWORD PTR |
36 ; CHECK: movsx | 52 ; CHECK: movsx |
37 ; CHECK: sar {{.*}},0x1f | 53 ; CHECK: sar {{.*}},0x1f |
38 ; CHECK-DAG: ds:0x0,{{.*}}i64v | 54 ; CHECK-DAG: ds:0x0,{{.*}}i64v |
39 ; CHECK-DAG: ds:0x4,{{.*}}i64v | 55 ; CHECK-DAG: ds:0x4,{{.*}}i64v |
40 | 56 |
| 57 ; ARM32-LABEL: from_int8 |
| 58 ; ARM32: movw {{.*}}i8v |
| 59 ; ARM32: ldrb |
| 60 ; ARM32: sxtb |
| 61 ; ARM32: movw {{.*}}i16v |
| 62 ; ARM32: strh |
| 63 ; ARM32: sxtb |
| 64 ; ARM32: movw {{.*}}i32v |
| 65 ; ARM32: str r |
| 66 ; ARM32: sxtb |
| 67 ; ARM32: asr |
| 68 ; ARM32: movw {{.*}}i64v |
| 69 ; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}] |
| 70 ; ARM32-DAG: str r{{.*}}, [{{.*}}, #4] |
| 71 |
41 define void @from_int16() { | 72 define void @from_int16() { |
42 entry: | 73 entry: |
43 %__0 = bitcast [2 x i8]* @i16v to i16* | 74 %__0 = bitcast [2 x i8]* @i16v to i16* |
44 %v0 = load i16, i16* %__0, align 1 | 75 %v0 = load i16, i16* %__0, align 1 |
45 %v1 = trunc i16 %v0 to i8 | 76 %v1 = trunc i16 %v0 to i8 |
46 %__3 = bitcast [1 x i8]* @i8v to i8* | 77 %__3 = bitcast [1 x i8]* @i8v to i8* |
47 store i8 %v1, i8* %__3, align 1 | 78 store i8 %v1, i8* %__3, align 1 |
48 %v2 = sext i16 %v0 to i32 | 79 %v2 = sext i16 %v0 to i32 |
49 %__5 = bitcast [4 x i8]* @i32v to i32* | 80 %__5 = bitcast [4 x i8]* @i32v to i32* |
50 store i32 %v2, i32* %__5, align 1 | 81 store i32 %v2, i32* %__5, align 1 |
51 %v3 = sext i16 %v0 to i64 | 82 %v3 = sext i16 %v0 to i64 |
52 %__7 = bitcast [8 x i8]* @i64v to i64* | 83 %__7 = bitcast [8 x i8]* @i64v to i64* |
53 store i64 %v3, i64* %__7, align 1 | 84 store i64 %v3, i64* %__7, align 1 |
54 ret void | 85 ret void |
55 } | 86 } |
56 ; CHECK-LABEL: from_int16 | 87 ; CHECK-LABEL: from_int16 |
57 ; CHECK: mov {{.*}},WORD PTR | 88 ; CHECK: mov {{.*}},WORD PTR |
58 ; CHECK: 0x0 {{.*}}i16v | 89 ; CHECK: 0x0 {{.*}}i16v |
59 ; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} | 90 ; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} |
60 ; CHECK: 0x0,{{.*}}i32v | 91 ; CHECK: 0x0,{{.*}}i32v |
61 ; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} | 92 ; CHECK: movsx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} |
62 ; CHECK: sar {{.*}},0x1f | 93 ; CHECK: sar {{.*}},0x1f |
63 ; CHECK: 0x0,{{.*}}i64v | 94 ; CHECK: 0x0,{{.*}}i64v |
64 | 95 |
| 96 ; ARM32-LABEL: from_int16 |
| 97 ; ARM32: movw {{.*}}i16v |
| 98 ; ARM32: ldrh |
| 99 ; ARM32: movw {{.*}}i8v |
| 100 ; ARM32: strb |
| 101 ; ARM32: sxth |
| 102 ; ARM32: movw {{.*}}i32v |
| 103 ; ARM32: str r |
| 104 ; ARM32: sxth |
| 105 ; ARM32: asr |
| 106 ; ARM32: movw {{.*}}i64v |
| 107 ; ARM32: str r |
| 108 |
65 define void @from_int32() { | 109 define void @from_int32() { |
66 entry: | 110 entry: |
67 %__0 = bitcast [4 x i8]* @i32v to i32* | 111 %__0 = bitcast [4 x i8]* @i32v to i32* |
68 %v0 = load i32, i32* %__0, align 1 | 112 %v0 = load i32, i32* %__0, align 1 |
69 %v1 = trunc i32 %v0 to i8 | 113 %v1 = trunc i32 %v0 to i8 |
70 %__3 = bitcast [1 x i8]* @i8v to i8* | 114 %__3 = bitcast [1 x i8]* @i8v to i8* |
71 store i8 %v1, i8* %__3, align 1 | 115 store i8 %v1, i8* %__3, align 1 |
72 %v2 = trunc i32 %v0 to i16 | 116 %v2 = trunc i32 %v0 to i16 |
73 %__5 = bitcast [2 x i8]* @i16v to i16* | 117 %__5 = bitcast [2 x i8]* @i16v to i16* |
74 store i16 %v2, i16* %__5, align 1 | 118 store i16 %v2, i16* %__5, align 1 |
75 %v3 = sext i32 %v0 to i64 | 119 %v3 = sext i32 %v0 to i64 |
76 %__7 = bitcast [8 x i8]* @i64v to i64* | 120 %__7 = bitcast [8 x i8]* @i64v to i64* |
77 store i64 %v3, i64* %__7, align 1 | 121 store i64 %v3, i64* %__7, align 1 |
78 ret void | 122 ret void |
79 } | 123 } |
80 ; CHECK-LABEL: from_int32 | 124 ; CHECK-LABEL: from_int32 |
81 ; CHECK: 0x0 {{.*}} i32v | 125 ; CHECK: 0x0 {{.*}} i32v |
82 ; CHECK: 0x0,{{.*}} i8v | 126 ; CHECK: 0x0,{{.*}} i8v |
83 ; CHECK: 0x0,{{.*}} i16v | 127 ; CHECK: 0x0,{{.*}} i16v |
84 ; CHECK: sar {{.*}},0x1f | 128 ; CHECK: sar {{.*}},0x1f |
85 ; CHECK: 0x0,{{.*}} i64v | 129 ; CHECK: 0x0,{{.*}} i64v |
86 | 130 |
| 131 ; ARM32-LABEL: from_int32 |
| 132 ; ARM32: movw {{.*}}i32v |
| 133 ; ARM32: ldr r |
| 134 ; ARM32: movw {{.*}}i8v |
| 135 ; ARM32: strb |
| 136 ; ARM32: movw {{.*}}i16v |
| 137 ; ARM32: strh |
| 138 ; ARM32: asr |
| 139 ; ARM32: movw {{.*}}i64v |
| 140 ; ARM32: str r |
| 141 |
87 define void @from_int64() { | 142 define void @from_int64() { |
88 entry: | 143 entry: |
89 %__0 = bitcast [8 x i8]* @i64v to i64* | 144 %__0 = bitcast [8 x i8]* @i64v to i64* |
90 %v0 = load i64, i64* %__0, align 1 | 145 %v0 = load i64, i64* %__0, align 1 |
91 %v1 = trunc i64 %v0 to i8 | 146 %v1 = trunc i64 %v0 to i8 |
92 %__3 = bitcast [1 x i8]* @i8v to i8* | 147 %__3 = bitcast [1 x i8]* @i8v to i8* |
93 store i8 %v1, i8* %__3, align 1 | 148 store i8 %v1, i8* %__3, align 1 |
94 %v2 = trunc i64 %v0 to i16 | 149 %v2 = trunc i64 %v0 to i16 |
95 %__5 = bitcast [2 x i8]* @i16v to i16* | 150 %__5 = bitcast [2 x i8]* @i16v to i16* |
96 store i16 %v2, i16* %__5, align 1 | 151 store i16 %v2, i16* %__5, align 1 |
97 %v3 = trunc i64 %v0 to i32 | 152 %v3 = trunc i64 %v0 to i32 |
98 %__7 = bitcast [4 x i8]* @i32v to i32* | 153 %__7 = bitcast [4 x i8]* @i32v to i32* |
99 store i32 %v3, i32* %__7, align 1 | 154 store i32 %v3, i32* %__7, align 1 |
100 ret void | 155 ret void |
101 } | 156 } |
102 ; CHECK-LABEL: from_int64 | 157 ; CHECK-LABEL: from_int64 |
103 ; CHECK: 0x0 {{.*}} i64v | 158 ; CHECK: 0x0 {{.*}} i64v |
104 ; CHECK: 0x0,{{.*}} i8v | 159 ; CHECK: 0x0,{{.*}} i8v |
105 ; CHECK: 0x0,{{.*}} i16v | 160 ; CHECK: 0x0,{{.*}} i16v |
106 ; CHECK: 0x0,{{.*}} i32v | 161 ; CHECK: 0x0,{{.*}} i32v |
107 | 162 |
| 163 ; ARM32-LABEL: from_int64 |
| 164 ; ARM32: movw {{.*}}i64v |
| 165 ; ARM32: ldr r |
| 166 ; ARM32: movw {{.*}}i8v |
| 167 ; ARM32: strb |
| 168 ; ARM32: movw {{.*}}i16v |
| 169 ; ARM32: strh |
| 170 ; ARM32: movw {{.*}}i32v |
| 171 ; ARM32: str r |
108 | 172 |
109 define void @from_uint8() { | 173 define void @from_uint8() { |
110 entry: | 174 entry: |
111 %__0 = bitcast [1 x i8]* @u8v to i8* | 175 %__0 = bitcast [1 x i8]* @u8v to i8* |
112 %v0 = load i8, i8* %__0, align 1 | 176 %v0 = load i8, i8* %__0, align 1 |
113 %v1 = zext i8 %v0 to i16 | 177 %v1 = zext i8 %v0 to i16 |
114 %__3 = bitcast [2 x i8]* @i16v to i16* | 178 %__3 = bitcast [2 x i8]* @i16v to i16* |
115 store i16 %v1, i16* %__3, align 1 | 179 store i16 %v1, i16* %__3, align 1 |
116 %v2 = zext i8 %v0 to i32 | 180 %v2 = zext i8 %v0 to i32 |
117 %__5 = bitcast [4 x i8]* @i32v to i32* | 181 %__5 = bitcast [4 x i8]* @i32v to i32* |
118 store i32 %v2, i32* %__5, align 1 | 182 store i32 %v2, i32* %__5, align 1 |
119 %v3 = zext i8 %v0 to i64 | 183 %v3 = zext i8 %v0 to i64 |
120 %__7 = bitcast [8 x i8]* @i64v to i64* | 184 %__7 = bitcast [8 x i8]* @i64v to i64* |
121 store i64 %v3, i64* %__7, align 1 | 185 store i64 %v3, i64* %__7, align 1 |
122 ret void | 186 ret void |
123 } | 187 } |
124 ; CHECK-LABEL: from_uint8 | 188 ; CHECK-LABEL: from_uint8 |
125 ; CHECK: 0x0 {{.*}} u8v | 189 ; CHECK: 0x0 {{.*}} u8v |
126 ; CHECK: movzx e{{.*}},{{[a-d]l|BYTE PTR}} | 190 ; CHECK: movzx e{{.*}},{{[a-d]l|BYTE PTR}} |
127 ; CHECK: 0x0,{{.*}} i16v | 191 ; CHECK: 0x0,{{.*}} i16v |
128 ; CHECK: movzx | 192 ; CHECK: movzx |
129 ; CHECK: 0x0,{{.*}} i32v | 193 ; CHECK: 0x0,{{.*}} i32v |
130 ; CHECK: movzx | 194 ; CHECK: movzx |
131 ; CHECK: mov {{.*}},0x0 | 195 ; CHECK: mov {{.*}},0x0 |
132 ; CHECK: 0x0,{{.*}} i64v | 196 ; CHECK: 0x0,{{.*}} i64v |
133 | 197 |
| 198 ; ARM32-LABEL: from_uint8 |
| 199 ; ARM32: movw {{.*}}u8v |
| 200 ; ARM32: ldrb |
| 201 ; ARM32: uxtb |
| 202 ; ARM32: movw {{.*}}i16v |
| 203 ; ARM32: strh |
| 204 ; ARM32: uxtb |
| 205 ; ARM32: movw {{.*}}i32v |
| 206 ; ARM32: str r |
| 207 ; ARM32: uxtb |
| 208 ; ARM32: mov {{.*}}, #0 |
| 209 ; ARM32: movw {{.*}}i64v |
| 210 ; ARM32: str r |
| 211 |
134 define void @from_uint16() { | 212 define void @from_uint16() { |
135 entry: | 213 entry: |
136 %__0 = bitcast [2 x i8]* @u16v to i16* | 214 %__0 = bitcast [2 x i8]* @u16v to i16* |
137 %v0 = load i16, i16* %__0, align 1 | 215 %v0 = load i16, i16* %__0, align 1 |
138 %v1 = trunc i16 %v0 to i8 | 216 %v1 = trunc i16 %v0 to i8 |
139 %__3 = bitcast [1 x i8]* @i8v to i8* | 217 %__3 = bitcast [1 x i8]* @i8v to i8* |
140 store i8 %v1, i8* %__3, align 1 | 218 store i8 %v1, i8* %__3, align 1 |
141 %v2 = zext i16 %v0 to i32 | 219 %v2 = zext i16 %v0 to i32 |
142 %__5 = bitcast [4 x i8]* @i32v to i32* | 220 %__5 = bitcast [4 x i8]* @i32v to i32* |
143 store i32 %v2, i32* %__5, align 1 | 221 store i32 %v2, i32* %__5, align 1 |
144 %v3 = zext i16 %v0 to i64 | 222 %v3 = zext i16 %v0 to i64 |
145 %__7 = bitcast [8 x i8]* @i64v to i64* | 223 %__7 = bitcast [8 x i8]* @i64v to i64* |
146 store i64 %v3, i64* %__7, align 1 | 224 store i64 %v3, i64* %__7, align 1 |
147 ret void | 225 ret void |
148 } | 226 } |
149 ; CHECK-LABEL: from_uint16 | 227 ; CHECK-LABEL: from_uint16 |
150 ; CHECK: 0x0 {{.*}} u16v | 228 ; CHECK: 0x0 {{.*}} u16v |
151 ; CHECK: 0x0,{{.*}} i8v | 229 ; CHECK: 0x0,{{.*}} i8v |
152 ; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} | 230 ; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} |
153 ; CHECK: 0x0,{{.*}} i32v | 231 ; CHECK: 0x0,{{.*}} i32v |
154 ; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} | 232 ; CHECK: movzx e{{.*}},{{.*x|[ds]i|bp|WORD PTR}} |
155 ; CHECK: mov {{.*}},0x0 | 233 ; CHECK: mov {{.*}},0x0 |
156 ; CHECK: 0x0,{{.*}} i64v | 234 ; CHECK: 0x0,{{.*}} i64v |
157 | 235 |
| 236 ; ARM32-LABEL: from_uint16 |
| 237 ; ARM32: movw {{.*}}u16v |
| 238 ; ARM32: ldrh |
| 239 ; ARM32: movw {{.*}}i8v |
| 240 ; ARM32: strb |
| 241 ; ARM32: uxth |
| 242 ; ARM32: movw {{.*}}i32v |
| 243 ; ARM32: str r |
| 244 ; ARM32: uxth |
| 245 ; ARM32: mov {{.*}}, #0 |
| 246 ; ARM32: movw {{.*}}i64v |
| 247 ; ARM32: str r |
| 248 |
158 define void @from_uint32() { | 249 define void @from_uint32() { |
159 entry: | 250 entry: |
160 %__0 = bitcast [4 x i8]* @u32v to i32* | 251 %__0 = bitcast [4 x i8]* @u32v to i32* |
161 %v0 = load i32, i32* %__0, align 1 | 252 %v0 = load i32, i32* %__0, align 1 |
162 %v1 = trunc i32 %v0 to i8 | 253 %v1 = trunc i32 %v0 to i8 |
163 %__3 = bitcast [1 x i8]* @i8v to i8* | 254 %__3 = bitcast [1 x i8]* @i8v to i8* |
164 store i8 %v1, i8* %__3, align 1 | 255 store i8 %v1, i8* %__3, align 1 |
165 %v2 = trunc i32 %v0 to i16 | 256 %v2 = trunc i32 %v0 to i16 |
166 %__5 = bitcast [2 x i8]* @i16v to i16* | 257 %__5 = bitcast [2 x i8]* @i16v to i16* |
167 store i16 %v2, i16* %__5, align 1 | 258 store i16 %v2, i16* %__5, align 1 |
168 %v3 = zext i32 %v0 to i64 | 259 %v3 = zext i32 %v0 to i64 |
169 %__7 = bitcast [8 x i8]* @i64v to i64* | 260 %__7 = bitcast [8 x i8]* @i64v to i64* |
170 store i64 %v3, i64* %__7, align 1 | 261 store i64 %v3, i64* %__7, align 1 |
171 ret void | 262 ret void |
172 } | 263 } |
173 ; CHECK-LABEL: from_uint32 | 264 ; CHECK-LABEL: from_uint32 |
174 ; CHECK: 0x0 {{.*}} u32v | 265 ; CHECK: 0x0 {{.*}} u32v |
175 ; CHECK: 0x0,{{.*}} i8v | 266 ; CHECK: 0x0,{{.*}} i8v |
176 ; CHECK: 0x0,{{.*}} i16v | 267 ; CHECK: 0x0,{{.*}} i16v |
177 ; CHECK: mov {{.*}},0x0 | 268 ; CHECK: mov {{.*}},0x0 |
178 ; CHECK: 0x0,{{.*}} i64v | 269 ; CHECK: 0x0,{{.*}} i64v |
179 | 270 |
| 271 ; ARM32-LABEL: from_uint32 |
| 272 ; ARM32: movw {{.*}}u32v |
| 273 ; ARM32: ldr r |
| 274 ; ARM32: movw {{.*}}i8v |
| 275 ; ARM32: strb |
| 276 ; ARM32: movw {{.*}}i16v |
| 277 ; ARM32: strh |
| 278 ; ARM32: mov {{.*}}, #0 |
| 279 ; ARM32: movw {{.*}}i64v |
| 280 ; ARM32: str r |
| 281 |
180 define void @from_uint64() { | 282 define void @from_uint64() { |
181 entry: | 283 entry: |
182 %__0 = bitcast [8 x i8]* @u64v to i64* | 284 %__0 = bitcast [8 x i8]* @u64v to i64* |
183 %v0 = load i64, i64* %__0, align 1 | 285 %v0 = load i64, i64* %__0, align 1 |
184 %v1 = trunc i64 %v0 to i8 | 286 %v1 = trunc i64 %v0 to i8 |
185 %__3 = bitcast [1 x i8]* @i8v to i8* | 287 %__3 = bitcast [1 x i8]* @i8v to i8* |
186 store i8 %v1, i8* %__3, align 1 | 288 store i8 %v1, i8* %__3, align 1 |
187 %v2 = trunc i64 %v0 to i16 | 289 %v2 = trunc i64 %v0 to i16 |
188 %__5 = bitcast [2 x i8]* @i16v to i16* | 290 %__5 = bitcast [2 x i8]* @i16v to i16* |
189 store i16 %v2, i16* %__5, align 1 | 291 store i16 %v2, i16* %__5, align 1 |
190 %v3 = trunc i64 %v0 to i32 | 292 %v3 = trunc i64 %v0 to i32 |
191 %__7 = bitcast [4 x i8]* @i32v to i32* | 293 %__7 = bitcast [4 x i8]* @i32v to i32* |
192 store i32 %v3, i32* %__7, align 1 | 294 store i32 %v3, i32* %__7, align 1 |
193 ret void | 295 ret void |
194 } | 296 } |
195 ; CHECK-LABEL: from_uint64 | 297 ; CHECK-LABEL: from_uint64 |
196 ; CHECK: 0x0 {{.*}} u64v | 298 ; CHECK: 0x0 {{.*}} u64v |
197 ; CHECK: 0x0,{{.*}} i8v | 299 ; CHECK: 0x0,{{.*}} i8v |
198 ; CHECK: 0x0,{{.*}} i16v | 300 ; CHECK: 0x0,{{.*}} i16v |
199 ; CHECK: 0x0,{{.*}} i32v | 301 ; CHECK: 0x0,{{.*}} i32v |
| 302 |
| 303 ; ARM32-LABEL: from_uint64 |
| 304 ; ARM32: movw {{.*}}u64v |
| 305 ; ARM32: ldr r |
| 306 ; ARM32: movw {{.*}}i8v |
| 307 ; ARM32: strb |
| 308 ; ARM32: movw {{.*}}i16v |
| 309 ; ARM32: strh |
| 310 ; ARM32: movw {{.*}}i32v |
| 311 ; ARM32: str r |
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