Index: src/arm/code-stubs-arm.cc |
diff --git a/src/arm/code-stubs-arm.cc b/src/arm/code-stubs-arm.cc |
index 9484f85f97e38ff87de543ec4c25dee3b9d6984e..fad4b6a5f070cfd68ff360150b6883ce1d767e2c 100644 |
--- a/src/arm/code-stubs-arm.cc |
+++ b/src/arm/code-stubs-arm.cc |
@@ -2036,8 +2036,8 @@ void StoreBufferOverflowStub::Generate(MacroAssembler* masm) { |
__ stm(db_w, sp, kCallerSaved | lr.bit()); |
if (save_doubles_ == kSaveFPRegs) { |
CpuFeatures::Scope scope(VFP2); |
- __ sub(sp, sp, Operand(kDoubleSize * DwVfpRegister::kNumRegisters)); |
- for (int i = 0; i < DwVfpRegister::kNumRegisters; i++) { |
+ __ sub(sp, sp, Operand(kDoubleSize * DwVfpRegister::NumAvailableRegisters())); |
+ for (int i = 0; i < DwVfpRegister::NumAvailableRegisters(); i++) { |
DwVfpRegister reg = DwVfpRegister::from_code(i); |
__ vstr(reg, MemOperand(sp, i * kDoubleSize)); |
} |
@@ -2054,11 +2054,12 @@ void StoreBufferOverflowStub::Generate(MacroAssembler* masm) { |
argument_count); |
if (save_doubles_ == kSaveFPRegs) { |
CpuFeatures::Scope scope(VFP2); |
- for (int i = 0; i < DwVfpRegister::kNumRegisters; i++) { |
+ for (int i = 0; i < DwVfpRegister::NumAvailableRegisters(); i++) { |
DwVfpRegister reg = DwVfpRegister::from_code(i); |
__ vldr(reg, MemOperand(sp, i * kDoubleSize)); |
} |
- __ add(sp, sp, Operand(kDoubleSize * DwVfpRegister::kNumRegisters)); |
+ __ add(sp, sp, Operand(kDoubleSize * |
+ DwVfpRegister::NumAvailableRegisters())); |
} |
__ ldm(ia_w, sp, kCallerSaved | pc.bit()); // Also pop pc to get Ret(0). |
} |
@@ -3644,7 +3645,7 @@ void MathPowStub::Generate(MacroAssembler* masm) { |
__ b(eq, &done); |
// Add +0 to convert -0 to +0. |
- __ vadd(double_scratch, double_base, kDoubleRegZero); |
+ __ vadd(double_scratch, double_base, DwVfpRegister::ZeroReg()); |
__ vsqrt(double_result, double_scratch); |
__ jmp(&done); |
@@ -3657,11 +3658,11 @@ void MathPowStub::Generate(MacroAssembler* masm) { |
// Math.pow(-Infinity, -0.5) == 0 (ECMA spec, 15.8.2.13). |
__ vmov(double_scratch, -V8_INFINITY, scratch); |
__ VFPCompareAndSetFlags(double_base, double_scratch); |
- __ vmov(double_result, kDoubleRegZero, eq); |
+ __ vmov(double_result, DwVfpRegister::ZeroReg(), eq); |
__ b(eq, &done); |
// Add +0 to convert -0 to +0. |
- __ vadd(double_scratch, double_base, kDoubleRegZero); |
+ __ vadd(double_scratch, double_base, DwVfpRegister::ZeroReg()); |
__ vmov(double_result, 1.0, scratch); |
__ vsqrt(double_scratch, double_scratch); |
__ vdiv(double_result, double_result, double_scratch); |
@@ -4022,9 +4023,10 @@ void JSEntryStub::GenerateBody(MacroAssembler* masm, bool is_construct) { |
if (CpuFeatures::IsSupported(VFP2)) { |
CpuFeatures::Scope scope(VFP2); |
// Save callee-saved vfp registers. |
- __ vstm(db_w, sp, kFirstCalleeSavedDoubleReg, kLastCalleeSavedDoubleReg); |
+ __ Vstm(db_w, sp, DwVfpRegister::FirstCalleeSavedReg(), |
+ DwVfpRegister::LastCalleeSavedReg()); |
// Set up the reserved register for 0.0. |
- __ vmov(kDoubleRegZero, 0.0); |
+ __ vmov(DwVfpRegister::ZeroReg(), 0.0); |
} |
// Get address of argv, see stm above. |
@@ -4036,7 +4038,7 @@ void JSEntryStub::GenerateBody(MacroAssembler* masm, bool is_construct) { |
// Set up argv in r4. |
int offset_to_argv = (kNumCalleeSaved + 1) * kPointerSize; |
if (CpuFeatures::IsSupported(VFP2)) { |
- offset_to_argv += kNumDoubleCalleeSaved * kDoubleSize; |
+ offset_to_argv += DwVfpRegister::NumCalleeSaved() * kDoubleSize; |
} |
__ ldr(r4, MemOperand(sp, offset_to_argv)); |
@@ -4176,7 +4178,8 @@ void JSEntryStub::GenerateBody(MacroAssembler* masm, bool is_construct) { |
if (CpuFeatures::IsSupported(VFP2)) { |
CpuFeatures::Scope scope(VFP2); |
// Restore callee-saved vfp registers. |
- __ vldm(ia_w, sp, kFirstCalleeSavedDoubleReg, kLastCalleeSavedDoubleReg); |
+ __ Vldm(ia_w, sp, DwVfpRegister::FirstCalleeSavedReg(), |
+ DwVfpRegister::LastCalleeSavedReg()); |
} |
__ ldm(ia_w, sp, kCalleeSaved | pc.bit()); |