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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 11428137: ARM: Make use of d16-d31 when available. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Address more comments Created 8 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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43 #include "debug.h" 43 #include "debug.h"
44 44
45 45
46 namespace v8 { 46 namespace v8 {
47 namespace internal { 47 namespace internal {
48 48
49 49
50 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) { 50 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) {
51 ASSERT(!reg.is(kDoubleRegZero)); 51 ASSERT(!reg.is(kDoubleRegZero));
52 ASSERT(!reg.is(kScratchDoubleReg)); 52 ASSERT(!reg.is(kScratchDoubleReg));
53 if (reg.code() > kDoubleRegZero.code())
54 return reg.code() - kNumReservedRegisters;
53 return reg.code(); 55 return reg.code();
54 } 56 }
55 57
56 58
59 DwVfpRegister DwVfpRegister::FromAllocationIndex(int index) {
60 ASSERT(index >= 0 && index < NumAllocatableRegisters());
61 if (index >= kDoubleRegZero.code())
Rodolph Perfetta 2012/12/17 14:38:30 Do we need to assert kScratchDoubleReg.code() - kD
hans 2012/12/17 15:32:46 Good idea! Done.
62 return from_code(index + kNumReservedRegisters);
63 return from_code(index);
64 }
65
66
67 const char* DwVfpRegister::AllocationIndexToString(int index) {
68 ASSERT(index >= 0 && index < NumAllocatableRegisters());
69 if (index >= kDoubleRegZero.code())
70 index += kNumReservedRegisters;
71 const char* const names[] = {
72 "d0",
73 "d1",
74 "d2",
75 "d3",
76 "d4",
77 "d5",
78 "d6",
79 "d7",
80 "d8",
81 "d9",
82 "d10",
83 "d11",
84 "d12",
85 "d13",
86 "d14",
87 "d15",
88 "d16",
89 "d17",
90 "d18",
91 "d19",
92 "d20",
93 "d21",
94 "d22",
95 "d23",
96 "d24",
97 "d25",
98 "d26",
99 "d27",
100 "d28",
101 "d29",
102 "d30",
103 "d31"
104 };
105 return names[index];
106 }
107
108
57 void RelocInfo::apply(intptr_t delta) { 109 void RelocInfo::apply(intptr_t delta) {
58 if (RelocInfo::IsInternalReference(rmode_)) { 110 if (RelocInfo::IsInternalReference(rmode_)) {
59 // absolute code pointer inside code object moves with the code object. 111 // absolute code pointer inside code object moves with the code object.
60 int32_t* p = reinterpret_cast<int32_t*>(pc_); 112 int32_t* p = reinterpret_cast<int32_t*>(pc_);
61 *p += delta; // relocate entry 113 *p += delta; // relocate entry
62 } 114 }
63 // We do not use pc relative addressing on ARM, so there is 115 // We do not use pc relative addressing on ARM, so there is
64 // nothing else to do. 116 // nothing else to do.
65 } 117 }
66 118
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499 551
500 552
501 void Assembler::set_target_address_at(Address pc, Address target) { 553 void Assembler::set_target_address_at(Address pc, Address target) {
502 set_target_pointer_at(pc, target); 554 set_target_pointer_at(pc, target);
503 } 555 }
504 556
505 557
506 } } // namespace v8::internal 558 } } // namespace v8::internal
507 559
508 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 560 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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