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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 11428137: ARM: Make use of d16-d31 when available. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: . Created 8 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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43 #include "debug.h" 43 #include "debug.h"
44 44
45 45
46 namespace v8 { 46 namespace v8 {
47 namespace internal { 47 namespace internal {
48 48
49 49
50 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) { 50 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) {
51 ASSERT(!reg.is(kDoubleRegZero)); 51 ASSERT(!reg.is(kDoubleRegZero));
52 ASSERT(!reg.is(kScratchDoubleReg)); 52 ASSERT(!reg.is(kScratchDoubleReg));
53 if (reg.code() > kDoubleRegZero.code())
54 return reg.code() - kNumReservedRegisters;
53 return reg.code(); 55 return reg.code();
54 } 56 }
55 57
56 58
59 DwVfpRegister DwVfpRegister::FromAllocationIndex(int index) {
60 ASSERT(index >= 0 && index < NumAllocatableRegisters());
61 ASSERT(kScratchDoubleReg.code() - kDoubleRegZero.code() ==
62 kNumReservedRegisters - 1);
63 if (index >= kDoubleRegZero.code())
64 return from_code(index + kNumReservedRegisters);
65 return from_code(index);
66 }
67
68
69 const char* DwVfpRegister::AllocationIndexToString(int index) {
70 ASSERT(index >= 0 && index < NumAllocatableRegisters());
71 ASSERT(kScratchDoubleReg.code() - kDoubleRegZero.code() ==
72 kNumReservedRegisters - 1);
73 if (index >= kDoubleRegZero.code())
74 index += kNumReservedRegisters;
75 const char* const names[] = {
76 "d0",
77 "d1",
78 "d2",
79 "d3",
80 "d4",
81 "d5",
82 "d6",
83 "d7",
84 "d8",
85 "d9",
86 "d10",
87 "d11",
88 "d12",
89 "d13",
90 "d14",
91 "d15",
92 "d16",
93 "d17",
94 "d18",
95 "d19",
96 "d20",
97 "d21",
98 "d22",
99 "d23",
100 "d24",
101 "d25",
102 "d26",
103 "d27",
104 "d28",
105 "d29",
106 "d30",
107 "d31"
108 };
109 return names[index];
110 }
111
112
57 void RelocInfo::apply(intptr_t delta) { 113 void RelocInfo::apply(intptr_t delta) {
58 if (RelocInfo::IsInternalReference(rmode_)) { 114 if (RelocInfo::IsInternalReference(rmode_)) {
59 // absolute code pointer inside code object moves with the code object. 115 // absolute code pointer inside code object moves with the code object.
60 int32_t* p = reinterpret_cast<int32_t*>(pc_); 116 int32_t* p = reinterpret_cast<int32_t*>(pc_);
61 *p += delta; // relocate entry 117 *p += delta; // relocate entry
62 } 118 }
63 // We do not use pc relative addressing on ARM, so there is 119 // We do not use pc relative addressing on ARM, so there is
64 // nothing else to do. 120 // nothing else to do.
65 } 121 }
66 122
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499 555
500 556
501 void Assembler::set_target_address_at(Address pc, Address target) { 557 void Assembler::set_target_address_at(Address pc, Address target) {
502 set_target_pointer_at(pc, target); 558 set_target_pointer_at(pc, target);
503 } 559 }
504 560
505 561
506 } } // namespace v8::internal 562 } } // namespace v8::internal
507 563
508 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 564 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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