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Issue 11428137: ARM: Make use of d16-d31 when available. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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3683 // Note that according to ECMA-262 15.8.2.13: 3683 // Note that according to ECMA-262 15.8.2.13:
3684 // Math.pow(-Infinity, 0.5) == Infinity 3684 // Math.pow(-Infinity, 0.5) == Infinity
3685 // Math.sqrt(-Infinity) == NaN 3685 // Math.sqrt(-Infinity) == NaN
3686 Label done; 3686 Label done;
3687 __ vmov(temp, -V8_INFINITY, scratch0()); 3687 __ vmov(temp, -V8_INFINITY, scratch0());
3688 __ VFPCompareAndSetFlags(input, temp); 3688 __ VFPCompareAndSetFlags(input, temp);
3689 __ vneg(result, temp, eq); 3689 __ vneg(result, temp, eq);
3690 __ b(&done, eq); 3690 __ b(&done, eq);
3691 3691
3692 // Add +0 to convert -0 to +0. 3692 // Add +0 to convert -0 to +0.
3693 __ vadd(result, input, kDoubleRegZero); 3693 __ vadd(result, input, DwVfpRegister::ZeroReg());
3694 __ vsqrt(result, result); 3694 __ vsqrt(result, result);
3695 __ bind(&done); 3695 __ bind(&done);
3696 } 3696 }
3697 3697
3698 3698
3699 void LCodeGen::DoPower(LPower* instr) { 3699 void LCodeGen::DoPower(LPower* instr) {
3700 Representation exponent_type = instr->hydrogen()->right()->representation(); 3700 Representation exponent_type = instr->hydrogen()->right()->representation();
3701 // Having marked this as a call, we can use any registers. 3701 // Having marked this as a call, we can use any registers.
3702 // Just make sure that the input/output registers are the expected ones. 3702 // Just make sure that the input/output registers are the expected ones.
3703 ASSERT(!instr->right()->IsDoubleRegister() || 3703 ASSERT(!instr->right()->IsDoubleRegister() ||
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5784 __ sub(scratch, result, Operand(index, LSL, kPointerSizeLog2 - kSmiTagSize)); 5784 __ sub(scratch, result, Operand(index, LSL, kPointerSizeLog2 - kSmiTagSize));
5785 __ ldr(result, FieldMemOperand(scratch, 5785 __ ldr(result, FieldMemOperand(scratch,
5786 FixedArray::kHeaderSize - kPointerSize)); 5786 FixedArray::kHeaderSize - kPointerSize));
5787 __ bind(&done); 5787 __ bind(&done);
5788 } 5788 }
5789 5789
5790 5790
5791 #undef __ 5791 #undef __
5792 5792
5793 } } // namespace v8::internal 5793 } } // namespace v8::internal
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