| Index: src/ia32/assembler-ia32.cc
|
| diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
|
| index 1f90e1ac1e04f083bc108308e77f557b0f2cccaa..8cccaa5a744ccaaf11dd862ab2d45e55f16d9521 100644
|
| --- a/src/ia32/assembler-ia32.cc
|
| +++ b/src/ia32/assembler-ia32.cc
|
| @@ -1966,6 +1966,16 @@ void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
| }
|
|
|
|
|
| +void Assembler::addsd(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0xF2);
|
| + EMIT(0x0F);
|
| + EMIT(0x58);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| @@ -1976,6 +1986,16 @@ void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| }
|
|
|
|
|
| +void Assembler::mulsd(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0xF2);
|
| + EMIT(0x0F);
|
| + EMIT(0x59);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| @@ -2372,7 +2392,7 @@ void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
| }
|
|
|
|
|
| -void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
| +void Assembler::pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| EMIT(0x66);
|
|
|