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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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862 case 0x18: return "prefetch"; | 862 case 0x18: return "prefetch"; |
863 case 0xA2: return "cpuid"; | 863 case 0xA2: return "cpuid"; |
864 case 0x31: return "rdtsc"; | 864 case 0x31: return "rdtsc"; |
865 case 0xBE: return "movsx_b"; | 865 case 0xBE: return "movsx_b"; |
866 case 0xBF: return "movsx_w"; | 866 case 0xBF: return "movsx_w"; |
867 case 0xB6: return "movzx_b"; | 867 case 0xB6: return "movzx_b"; |
868 case 0xB7: return "movzx_w"; | 868 case 0xB7: return "movzx_w"; |
869 case 0xAF: return "imul"; | 869 case 0xAF: return "imul"; |
870 case 0xA5: return "shld"; | 870 case 0xA5: return "shld"; |
871 case 0xAD: return "shrd"; | 871 case 0xAD: return "shrd"; |
| 872 case 0xAC: return "shrd"; // 3-operand version. |
872 case 0xAB: return "bts"; | 873 case 0xAB: return "bts"; |
873 default: return NULL; | 874 default: return NULL; |
874 } | 875 } |
875 } | 876 } |
876 | 877 |
877 | 878 |
878 // Disassembled instruction '*instr' and writes it into 'out_buffer'. | 879 // Disassembled instruction '*instr' and writes it into 'out_buffer'. |
879 int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, | 880 int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
880 byte* instr) { | 881 byte* instr) { |
881 tmp_buffer_pos_ = 0; // starting to write as position 0 | 882 tmp_buffer_pos_ = 0; // starting to write as position 0 |
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1708 fprintf(f, " "); | 1709 fprintf(f, " "); |
1709 } | 1710 } |
1710 fprintf(f, " %s\n", buffer.start()); | 1711 fprintf(f, " %s\n", buffer.start()); |
1711 } | 1712 } |
1712 } | 1713 } |
1713 | 1714 |
1714 | 1715 |
1715 } // namespace disasm | 1716 } // namespace disasm |
1716 | 1717 |
1717 #endif // V8_TARGET_ARCH_IA32 | 1718 #endif // V8_TARGET_ARCH_IA32 |
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