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Issue 11418149: Faster implementation of Math.exp() (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: fix Win build Created 8 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1959 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 1959 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
1960 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1960 ASSERT(CpuFeatures::IsEnabled(SSE2));
1961 EnsureSpace ensure_space(this); 1961 EnsureSpace ensure_space(this);
1962 EMIT(0xF2); 1962 EMIT(0xF2);
1963 EMIT(0x0F); 1963 EMIT(0x0F);
1964 EMIT(0x58); 1964 EMIT(0x58);
1965 emit_sse_operand(dst, src); 1965 emit_sse_operand(dst, src);
1966 } 1966 }
1967 1967
1968 1968
1969 void Assembler::addsd(XMMRegister dst, const Operand& src) {
1970 ASSERT(CpuFeatures::IsEnabled(SSE2));
1971 EnsureSpace ensure_space(this);
1972 EMIT(0xF2);
1973 EMIT(0x0F);
1974 EMIT(0x58);
1975 emit_sse_operand(dst, src);
1976 }
1977
1978
1969 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 1979 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
1970 ASSERT(CpuFeatures::IsEnabled(SSE2)); 1980 ASSERT(CpuFeatures::IsEnabled(SSE2));
1971 EnsureSpace ensure_space(this); 1981 EnsureSpace ensure_space(this);
1972 EMIT(0xF2); 1982 EMIT(0xF2);
1973 EMIT(0x0F); 1983 EMIT(0x0F);
1974 EMIT(0x59); 1984 EMIT(0x59);
1975 emit_sse_operand(dst, src); 1985 emit_sse_operand(dst, src);
1976 } 1986 }
1977 1987
1978 1988
1989 void Assembler::mulsd(XMMRegister dst, const Operand& src) {
1990 ASSERT(CpuFeatures::IsEnabled(SSE2));
1991 EnsureSpace ensure_space(this);
1992 EMIT(0xF2);
1993 EMIT(0x0F);
1994 EMIT(0x59);
1995 emit_sse_operand(dst, src);
1996 }
1997
1998
1979 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 1999 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
1980 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2000 ASSERT(CpuFeatures::IsEnabled(SSE2));
1981 EnsureSpace ensure_space(this); 2001 EnsureSpace ensure_space(this);
1982 EMIT(0xF2); 2002 EMIT(0xF2);
1983 EMIT(0x0F); 2003 EMIT(0x0F);
1984 EMIT(0x5C); 2004 EMIT(0x5C);
1985 emit_sse_operand(dst, src); 2005 emit_sse_operand(dst, src);
1986 } 2006 }
1987 2007
1988 2008
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2365 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2385 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2366 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2386 ASSERT(CpuFeatures::IsEnabled(SSE2));
2367 EnsureSpace ensure_space(this); 2387 EnsureSpace ensure_space(this);
2368 EMIT(0x66); 2388 EMIT(0x66);
2369 EMIT(0x0F); 2389 EMIT(0x0F);
2370 EMIT(0xD3); 2390 EMIT(0xD3);
2371 emit_sse_operand(dst, src); 2391 emit_sse_operand(dst, src);
2372 } 2392 }
2373 2393
2374 2394
2375 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2395 void Assembler::pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle) {
2376 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2396 ASSERT(CpuFeatures::IsEnabled(SSE2));
2377 EnsureSpace ensure_space(this); 2397 EnsureSpace ensure_space(this);
2378 EMIT(0x66); 2398 EMIT(0x66);
2379 EMIT(0x0F); 2399 EMIT(0x0F);
2380 EMIT(0x70); 2400 EMIT(0x70);
2381 emit_sse_operand(dst, src); 2401 emit_sse_operand(dst, src);
2382 EMIT(shuffle); 2402 EMIT(shuffle);
2383 } 2403 }
2384 2404
2385 2405
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2624 fprintf(coverage_log, "%s\n", file_line); 2644 fprintf(coverage_log, "%s\n", file_line);
2625 fflush(coverage_log); 2645 fflush(coverage_log);
2626 } 2646 }
2627 } 2647 }
2628 2648
2629 #endif 2649 #endif
2630 2650
2631 } } // namespace v8::internal 2651 } } // namespace v8::internal
2632 2652
2633 #endif // V8_TARGET_ARCH_IA32 2653 #endif // V8_TARGET_ARCH_IA32
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