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Issue 11414262: Revert 13105: "Enable stub generation using Hydrogen/Lithium." (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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58 // 58 //
59 // 3) By not using an enum, we are possibly preventing the compiler from 59 // 3) By not using an enum, we are possibly preventing the compiler from
60 // doing certain constant folds, which may significantly reduce the 60 // doing certain constant folds, which may significantly reduce the
61 // code generated for some assembly instructions (because they boil down 61 // code generated for some assembly instructions (because they boil down
62 // to a few constants). If this is a problem, we could change the code 62 // to a few constants). If this is a problem, we could change the code
63 // such that we use an enum in optimized mode, and the struct in debug 63 // such that we use an enum in optimized mode, and the struct in debug
64 // mode. This way we get the compile-time error checking in debug mode 64 // mode. This way we get the compile-time error checking in debug mode
65 // and best performance in optimized code. 65 // and best performance in optimized code.
66 // 66 //
67 struct Register { 67 struct Register {
68 static const int kMaxNumAllocatableRegisters = 6; 68 static const int kNumAllocatableRegisters = 6;
69 static int NumAllocatableRegisters() {
70 return kMaxNumAllocatableRegisters;
71 }
72 static const int kNumRegisters = 8; 69 static const int kNumRegisters = 8;
73 70
74 static inline const char* AllocationIndexToString(int index); 71 static inline const char* AllocationIndexToString(int index);
75 72
76 static inline int ToAllocationIndex(Register reg); 73 static inline int ToAllocationIndex(Register reg);
77 74
78 static inline Register FromAllocationIndex(int index); 75 static inline Register FromAllocationIndex(int index);
79 76
80 static Register from_code(int code) { 77 static Register from_code(int code) {
81 ASSERT(code >= 0); 78 ASSERT(code >= 0);
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115 const Register edx = { kRegister_edx_Code }; 112 const Register edx = { kRegister_edx_Code };
116 const Register ebx = { kRegister_ebx_Code }; 113 const Register ebx = { kRegister_ebx_Code };
117 const Register esp = { kRegister_esp_Code }; 114 const Register esp = { kRegister_esp_Code };
118 const Register ebp = { kRegister_ebp_Code }; 115 const Register ebp = { kRegister_ebp_Code };
119 const Register esi = { kRegister_esi_Code }; 116 const Register esi = { kRegister_esi_Code };
120 const Register edi = { kRegister_edi_Code }; 117 const Register edi = { kRegister_edi_Code };
121 const Register no_reg = { kRegister_no_reg_Code }; 118 const Register no_reg = { kRegister_no_reg_Code };
122 119
123 120
124 inline const char* Register::AllocationIndexToString(int index) { 121 inline const char* Register::AllocationIndexToString(int index) {
125 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); 122 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
126 // This is the mapping of allocation indices to registers. 123 // This is the mapping of allocation indices to registers.
127 const char* const kNames[] = { "eax", "ecx", "edx", "ebx", "esi", "edi" }; 124 const char* const kNames[] = { "eax", "ecx", "edx", "ebx", "esi", "edi" };
128 return kNames[index]; 125 return kNames[index];
129 } 126 }
130 127
131 128
132 inline int Register::ToAllocationIndex(Register reg) { 129 inline int Register::ToAllocationIndex(Register reg) {
133 ASSERT(reg.is_valid() && !reg.is(esp) && !reg.is(ebp)); 130 ASSERT(reg.is_valid() && !reg.is(esp) && !reg.is(ebp));
134 return (reg.code() >= 6) ? reg.code() - 2 : reg.code(); 131 return (reg.code() >= 6) ? reg.code() - 2 : reg.code();
135 } 132 }
136 133
137 134
138 inline Register Register::FromAllocationIndex(int index) { 135 inline Register Register::FromAllocationIndex(int index) {
139 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); 136 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
140 return (index >= 4) ? from_code(index + 2) : from_code(index); 137 return (index >= 4) ? from_code(index + 2) : from_code(index);
141 } 138 }
142 139
143 140
144 struct IntelDoubleRegister { 141 struct XMMRegister {
145 static const int kMaxNumAllocatableRegisters = 7; 142 static const int kNumAllocatableRegisters = 7;
146 explicit IntelDoubleRegister(int code) { code_ = code; } 143 static const int kNumRegisters = 8;
147 static int NumAllocatableRegisters();
148 static int NumRegisters();
149 static const char* AllocationIndexToString(int index);
150 144
151 static int ToAllocationIndex(IntelDoubleRegister reg) { 145 static int ToAllocationIndex(XMMRegister reg) {
152 ASSERT(reg.code() != 0); 146 ASSERT(reg.code() != 0);
153 return reg.code() - 1; 147 return reg.code() - 1;
154 } 148 }
155 149
156 static IntelDoubleRegister FromAllocationIndex(int index) { 150 static XMMRegister FromAllocationIndex(int index) {
157 ASSERT(index >= 0 && index < NumAllocatableRegisters()); 151 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
158 return from_code(index + 1); 152 return from_code(index + 1);
159 } 153 }
160 154
161 static IntelDoubleRegister from_code(int code) {
162 return IntelDoubleRegister(code);
163 }
164
165 bool is_valid() const {
166 return 0 <= code_ && code_ < NumRegisters();
167 }
168 int code() const {
169 ASSERT(is_valid());
170 return code_;
171 }
172
173 int code_;
174 };
175
176 struct XMMRegister : IntelDoubleRegister {
177 static const int kNumAllocatableRegisters = 7;
178 static const int kNumRegisters = 8;
179
180 explicit XMMRegister(int code) : IntelDoubleRegister(code) {}
181
182 static XMMRegister from_code(int code) {
183 return XMMRegister(code);
184 }
185
186 bool is(XMMRegister reg) const { return code_ == reg.code_; }
187
188 static XMMRegister FromAllocationIndex(int index) {
189 ASSERT(index >= 0 && index < NumAllocatableRegisters());
190 return from_code(index + 1);
191 }
192
193 static const char* AllocationIndexToString(int index) { 155 static const char* AllocationIndexToString(int index) {
194 ASSERT(index >= 0 && index < kNumAllocatableRegisters); 156 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
195 const char* const names[] = { 157 const char* const names[] = {
196 "xmm1", 158 "xmm1",
197 "xmm2", 159 "xmm2",
198 "xmm3", 160 "xmm3",
199 "xmm4", 161 "xmm4",
200 "xmm5", 162 "xmm5",
201 "xmm6", 163 "xmm6",
202 "xmm7" 164 "xmm7"
203 }; 165 };
204 return names[index]; 166 return names[index];
205 } 167 }
206 };
207
208
209 const XMMRegister xmm0 = XMMRegister(0);
210 const XMMRegister xmm1 = XMMRegister(1);
211 const XMMRegister xmm2 = XMMRegister(2);
212 const XMMRegister xmm3 = XMMRegister(3);
213 const XMMRegister xmm4 = XMMRegister(4);
214 const XMMRegister xmm5 = XMMRegister(5);
215 const XMMRegister xmm6 = XMMRegister(6);
216 const XMMRegister xmm7 = XMMRegister(7);
217
218 struct X87TopOfStackRegister : IntelDoubleRegister {
219 static const int kNumAllocatableRegisters = 1;
220 static const int kNumRegisters = 1;
221
222 explicit X87TopOfStackRegister(int code)
223 : IntelDoubleRegister(code) {}
224
225 bool is(X87TopOfStackRegister reg) const {
226 return code_ == reg.code_;
227 }
228
229 static const char* AllocationIndexToString(int index) {
230 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
231 const char* const names[] = {
232 "st0",
233 };
234 return names[index];
235 }
236 168
237 static int ToAllocationIndex(X87TopOfStackRegister reg) { 169 static XMMRegister from_code(int code) {
238 ASSERT(reg.code() == 0); 170 XMMRegister r = { code };
239 return 0; 171 return r;
240 } 172 }
173
174 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; }
175 bool is(XMMRegister reg) const { return code_ == reg.code_; }
176 int code() const {
177 ASSERT(is_valid());
178 return code_;
179 }
180
181 int code_;
241 }; 182 };
242 183
243 const X87TopOfStackRegister x87tos = X87TopOfStackRegister(0);
244 184
245 typedef IntelDoubleRegister DoubleRegister; 185 const XMMRegister xmm0 = { 0 };
186 const XMMRegister xmm1 = { 1 };
187 const XMMRegister xmm2 = { 2 };
188 const XMMRegister xmm3 = { 3 };
189 const XMMRegister xmm4 = { 4 };
190 const XMMRegister xmm5 = { 5 };
191 const XMMRegister xmm6 = { 6 };
192 const XMMRegister xmm7 = { 7 };
193
194
195 typedef XMMRegister DoubleRegister;
246 196
247 197
248 enum Condition { 198 enum Condition {
249 // any value < 0 is considered no_condition 199 // any value < 0 is considered no_condition
250 no_condition = -1, 200 no_condition = -1,
251 201
252 overflow = 0, 202 overflow = 0,
253 no_overflow = 1, 203 no_overflow = 1,
254 below = 2, 204 below = 2,
255 above_equal = 3, 205 above_equal = 3,
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1257 private: 1207 private:
1258 Assembler* assembler_; 1208 Assembler* assembler_;
1259 #ifdef DEBUG 1209 #ifdef DEBUG
1260 int space_before_; 1210 int space_before_;
1261 #endif 1211 #endif
1262 }; 1212 };
1263 1213
1264 } } // namespace v8::internal 1214 } } // namespace v8::internal
1265 1215
1266 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1216 #endif // V8_IA32_ASSEMBLER_IA32_H_
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