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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 283 } | 283 } |
| 284 | 284 |
| 285 | 285 |
| 286 void MacroAssembler::Move(Register dst, Register src, Condition cond) { | 286 void MacroAssembler::Move(Register dst, Register src, Condition cond) { |
| 287 if (!dst.is(src)) { | 287 if (!dst.is(src)) { |
| 288 mov(dst, src, LeaveCC, cond); | 288 mov(dst, src, LeaveCC, cond); |
| 289 } | 289 } |
| 290 } | 290 } |
| 291 | 291 |
| 292 | 292 |
| 293 void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) { | 293 void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) { |
| 294 ASSERT(CpuFeatures::IsSupported(VFP2)); | 294 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 295 CpuFeatures::Scope scope(VFP2); | 295 CpuFeatures::Scope scope(VFP2); |
| 296 if (!dst.is(src)) { | 296 if (!dst.is(src)) { |
| 297 vmov(dst, src); | 297 vmov(dst, src); |
| 298 } | 298 } |
| 299 } | 299 } |
| 300 | 300 |
| 301 | 301 |
| 302 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, | 302 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, |
| 303 Condition cond) { | 303 Condition cond) { |
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| 635 | 635 |
| 636 void MacroAssembler::PopSafepointRegisters() { | 636 void MacroAssembler::PopSafepointRegisters() { |
| 637 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; | 637 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; |
| 638 ldm(ia_w, sp, kSafepointSavedRegisters); | 638 ldm(ia_w, sp, kSafepointSavedRegisters); |
| 639 add(sp, sp, Operand(num_unsaved * kPointerSize)); | 639 add(sp, sp, Operand(num_unsaved * kPointerSize)); |
| 640 } | 640 } |
| 641 | 641 |
| 642 | 642 |
| 643 void MacroAssembler::PushSafepointRegistersAndDoubles() { | 643 void MacroAssembler::PushSafepointRegistersAndDoubles() { |
| 644 PushSafepointRegisters(); | 644 PushSafepointRegisters(); |
| 645 sub(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() * | 645 sub(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters * |
| 646 kDoubleSize)); | 646 kDoubleSize)); |
| 647 for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) { | 647 for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) { |
| 648 vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); | 648 vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); |
| 649 } | 649 } |
| 650 } | 650 } |
| 651 | 651 |
| 652 | 652 |
| 653 void MacroAssembler::PopSafepointRegistersAndDoubles() { | 653 void MacroAssembler::PopSafepointRegistersAndDoubles() { |
| 654 for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) { | 654 for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) { |
| 655 vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); | 655 vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); |
| 656 } | 656 } |
| 657 add(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() * | 657 add(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters * |
| 658 kDoubleSize)); | 658 kDoubleSize)); |
| 659 PopSafepointRegisters(); | 659 PopSafepointRegisters(); |
| 660 } | 660 } |
| 661 | 661 |
| 662 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src, | 662 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src, |
| 663 Register dst) { | 663 Register dst) { |
| 664 str(src, SafepointRegistersAndDoublesSlot(dst)); | 664 str(src, SafepointRegistersAndDoublesSlot(dst)); |
| 665 } | 665 } |
| 666 | 666 |
| 667 | 667 |
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| 683 } | 683 } |
| 684 | 684 |
| 685 | 685 |
| 686 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { | 686 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { |
| 687 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); | 687 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); |
| 688 } | 688 } |
| 689 | 689 |
| 690 | 690 |
| 691 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { | 691 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { |
| 692 // General purpose registers are pushed last on the stack. | 692 // General purpose registers are pushed last on the stack. |
| 693 int doubles_size = DwVfpRegister::NumAllocatableRegisters() * kDoubleSize; | 693 int doubles_size = DwVfpRegister::kNumAllocatableRegisters * kDoubleSize; |
| 694 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; | 694 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; |
| 695 return MemOperand(sp, doubles_size + register_offset); | 695 return MemOperand(sp, doubles_size + register_offset); |
| 696 } | 696 } |
| 697 | 697 |
| 698 | 698 |
| 699 void MacroAssembler::Ldrd(Register dst1, Register dst2, | 699 void MacroAssembler::Ldrd(Register dst1, Register dst2, |
| 700 const MemOperand& src, Condition cond) { | 700 const MemOperand& src, Condition cond) { |
| 701 ASSERT(src.rm().is(no_reg)); | 701 ASSERT(src.rm().is(no_reg)); |
| 702 ASSERT(!dst1.is(lr)); // r14. | 702 ASSERT(!dst1.is(lr)); // r14. |
| 703 ASSERT_EQ(0, dst1.code() % 2); | 703 ASSERT_EQ(0, dst1.code() % 2); |
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| 959 #endif | 959 #endif |
| 960 | 960 |
| 961 // Tear down the exit frame, pop the arguments, and return. | 961 // Tear down the exit frame, pop the arguments, and return. |
| 962 mov(sp, Operand(fp)); | 962 mov(sp, Operand(fp)); |
| 963 ldm(ia_w, sp, fp.bit() | lr.bit()); | 963 ldm(ia_w, sp, fp.bit() | lr.bit()); |
| 964 if (argument_count.is_valid()) { | 964 if (argument_count.is_valid()) { |
| 965 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2)); | 965 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2)); |
| 966 } | 966 } |
| 967 } | 967 } |
| 968 | 968 |
| 969 void MacroAssembler::GetCFunctionDoubleResult(const DwVfpRegister dst) { | 969 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) { |
| 970 ASSERT(CpuFeatures::IsSupported(VFP2)); | 970 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 971 if (use_eabi_hardfloat()) { | 971 if (use_eabi_hardfloat()) { |
| 972 Move(dst, d0); | 972 Move(dst, d0); |
| 973 } else { | 973 } else { |
| 974 vmov(dst, r0, r1); | 974 vmov(dst, r0, r1); |
| 975 } | 975 } |
| 976 } | 976 } |
| 977 | 977 |
| 978 | 978 |
| 979 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { | 979 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { |
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| 2709 | 2709 |
| 2710 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) { | 2710 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) { |
| 2711 CallRuntime(Runtime::FunctionForId(fid), num_arguments); | 2711 CallRuntime(Runtime::FunctionForId(fid), num_arguments); |
| 2712 } | 2712 } |
| 2713 | 2713 |
| 2714 | 2714 |
| 2715 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) { | 2715 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) { |
| 2716 const Runtime::Function* function = Runtime::FunctionForId(id); | 2716 const Runtime::Function* function = Runtime::FunctionForId(id); |
| 2717 mov(r0, Operand(function->nargs)); | 2717 mov(r0, Operand(function->nargs)); |
| 2718 mov(r1, Operand(ExternalReference(function, isolate()))); | 2718 mov(r1, Operand(ExternalReference(function, isolate()))); |
| 2719 SaveFPRegsMode mode = CpuFeatures::IsSupported(VFP2) | 2719 CEntryStub stub(1, kSaveFPRegs); |
| 2720 ? kSaveFPRegs | |
| 2721 : kDontSaveFPRegs; | |
| 2722 CEntryStub stub(1, mode); | |
| 2723 CallStub(&stub); | 2720 CallStub(&stub); |
| 2724 } | 2721 } |
| 2725 | 2722 |
| 2726 | 2723 |
| 2727 void MacroAssembler::CallExternalReference(const ExternalReference& ext, | 2724 void MacroAssembler::CallExternalReference(const ExternalReference& ext, |
| 2728 int num_arguments) { | 2725 int num_arguments) { |
| 2729 mov(r0, Operand(num_arguments)); | 2726 mov(r0, Operand(num_arguments)); |
| 2730 mov(r1, Operand(ext)); | 2727 mov(r1, Operand(ext)); |
| 2731 | 2728 |
| 2732 CEntryStub stub(1); | 2729 CEntryStub stub(1); |
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| 3388 | 3385 |
| 3389 static const int kRegisterPassedArguments = 4; | 3386 static const int kRegisterPassedArguments = 4; |
| 3390 | 3387 |
| 3391 | 3388 |
| 3392 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments, | 3389 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments, |
| 3393 int num_double_arguments) { | 3390 int num_double_arguments) { |
| 3394 int stack_passed_words = 0; | 3391 int stack_passed_words = 0; |
| 3395 if (use_eabi_hardfloat()) { | 3392 if (use_eabi_hardfloat()) { |
| 3396 // In the hard floating point calling convention, we can use | 3393 // In the hard floating point calling convention, we can use |
| 3397 // all double registers to pass doubles. | 3394 // all double registers to pass doubles. |
| 3398 if (num_double_arguments > DoubleRegister::NumRegisters()) { | 3395 if (num_double_arguments > DoubleRegister::kNumRegisters) { |
| 3399 stack_passed_words += | 3396 stack_passed_words += |
| 3400 2 * (num_double_arguments - DoubleRegister::NumRegisters()); | 3397 2 * (num_double_arguments - DoubleRegister::kNumRegisters); |
| 3401 } | 3398 } |
| 3402 } else { | 3399 } else { |
| 3403 // In the soft floating point calling convention, every double | 3400 // In the soft floating point calling convention, every double |
| 3404 // argument is passed using two registers. | 3401 // argument is passed using two registers. |
| 3405 num_reg_arguments += 2 * num_double_arguments; | 3402 num_reg_arguments += 2 * num_double_arguments; |
| 3406 } | 3403 } |
| 3407 // Up to four simple arguments are passed in registers r0..r3. | 3404 // Up to four simple arguments are passed in registers r0..r3. |
| 3408 if (num_reg_arguments > kRegisterPassedArguments) { | 3405 if (num_reg_arguments > kRegisterPassedArguments) { |
| 3409 stack_passed_words += num_reg_arguments - kRegisterPassedArguments; | 3406 stack_passed_words += num_reg_arguments - kRegisterPassedArguments; |
| 3410 } | 3407 } |
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| 3431 } | 3428 } |
| 3432 } | 3429 } |
| 3433 | 3430 |
| 3434 | 3431 |
| 3435 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, | 3432 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, |
| 3436 Register scratch) { | 3433 Register scratch) { |
| 3437 PrepareCallCFunction(num_reg_arguments, 0, scratch); | 3434 PrepareCallCFunction(num_reg_arguments, 0, scratch); |
| 3438 } | 3435 } |
| 3439 | 3436 |
| 3440 | 3437 |
| 3441 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg) { | 3438 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) { |
| 3442 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3439 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3443 if (use_eabi_hardfloat()) { | 3440 if (use_eabi_hardfloat()) { |
| 3444 Move(d0, dreg); | 3441 Move(d0, dreg); |
| 3445 } else { | 3442 } else { |
| 3446 vmov(r0, r1, dreg); | 3443 vmov(r0, r1, dreg); |
| 3447 } | 3444 } |
| 3448 } | 3445 } |
| 3449 | 3446 |
| 3450 | 3447 |
| 3451 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg1, | 3448 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1, |
| 3452 DwVfpRegister dreg2) { | 3449 DoubleRegister dreg2) { |
| 3453 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3450 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3454 if (use_eabi_hardfloat()) { | 3451 if (use_eabi_hardfloat()) { |
| 3455 if (dreg2.is(d0)) { | 3452 if (dreg2.is(d0)) { |
| 3456 ASSERT(!dreg1.is(d1)); | 3453 ASSERT(!dreg1.is(d1)); |
| 3457 Move(d1, dreg2); | 3454 Move(d1, dreg2); |
| 3458 Move(d0, dreg1); | 3455 Move(d0, dreg1); |
| 3459 } else { | 3456 } else { |
| 3460 Move(d0, dreg1); | 3457 Move(d0, dreg1); |
| 3461 Move(d1, dreg2); | 3458 Move(d1, dreg2); |
| 3462 } | 3459 } |
| 3463 } else { | 3460 } else { |
| 3464 vmov(r0, r1, dreg1); | 3461 vmov(r0, r1, dreg1); |
| 3465 vmov(r2, r3, dreg2); | 3462 vmov(r2, r3, dreg2); |
| 3466 } | 3463 } |
| 3467 } | 3464 } |
| 3468 | 3465 |
| 3469 | 3466 |
| 3470 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg, | 3467 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg, |
| 3471 Register reg) { | 3468 Register reg) { |
| 3472 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3469 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3473 if (use_eabi_hardfloat()) { | 3470 if (use_eabi_hardfloat()) { |
| 3474 Move(d0, dreg); | 3471 Move(d0, dreg); |
| 3475 Move(r0, reg); | 3472 Move(r0, reg); |
| 3476 } else { | 3473 } else { |
| 3477 Move(r2, reg); | 3474 Move(r2, reg); |
| 3478 vmov(r0, r1, dreg); | 3475 vmov(r0, r1, dreg); |
| 3479 } | 3476 } |
| 3480 } | 3477 } |
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| 3743 bind(&done); | 3740 bind(&done); |
| 3744 } | 3741 } |
| 3745 | 3742 |
| 3746 | 3743 |
| 3747 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) { | 3744 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) { |
| 3748 Usat(output_reg, 8, Operand(input_reg)); | 3745 Usat(output_reg, 8, Operand(input_reg)); |
| 3749 } | 3746 } |
| 3750 | 3747 |
| 3751 | 3748 |
| 3752 void MacroAssembler::ClampDoubleToUint8(Register result_reg, | 3749 void MacroAssembler::ClampDoubleToUint8(Register result_reg, |
| 3753 DwVfpRegister input_reg, | 3750 DoubleRegister input_reg, |
| 3754 DwVfpRegister temp_double_reg) { | 3751 DoubleRegister temp_double_reg) { |
| 3755 Label above_zero; | 3752 Label above_zero; |
| 3756 Label done; | 3753 Label done; |
| 3757 Label in_bounds; | 3754 Label in_bounds; |
| 3758 | 3755 |
| 3759 Vmov(temp_double_reg, 0.0); | 3756 Vmov(temp_double_reg, 0.0); |
| 3760 VFPCompareAndSetFlags(input_reg, temp_double_reg); | 3757 VFPCompareAndSetFlags(input_reg, temp_double_reg); |
| 3761 b(gt, &above_zero); | 3758 b(gt, &above_zero); |
| 3762 | 3759 |
| 3763 // Double value is less than zero, NaN or Inf, return 0. | 3760 // Double value is less than zero, NaN or Inf, return 0. |
| 3764 mov(result_reg, Operand(0)); | 3761 mov(result_reg, Operand(0)); |
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| 3903 void CodePatcher::EmitCondition(Condition cond) { | 3900 void CodePatcher::EmitCondition(Condition cond) { |
| 3904 Instr instr = Assembler::instr_at(masm_.pc_); | 3901 Instr instr = Assembler::instr_at(masm_.pc_); |
| 3905 instr = (instr & ~kCondMask) | cond; | 3902 instr = (instr & ~kCondMask) | cond; |
| 3906 masm_.emit(instr); | 3903 masm_.emit(instr); |
| 3907 } | 3904 } |
| 3908 | 3905 |
| 3909 | 3906 |
| 3910 } } // namespace v8::internal | 3907 } } // namespace v8::internal |
| 3911 | 3908 |
| 3912 #endif // V8_TARGET_ARCH_ARM | 3909 #endif // V8_TARGET_ARCH_ARM |
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