Subzero: Fold icmp into br/select lowering.

tests_lit/llvm2ice_tests/select-opt.ll

 ; Simple test of the select instruction.  The CHECK lines are only
 ; checking for basic instruction patterns that should be present
 ; regardless of the optimization level, so there are no special OPTM1
 ; match lines.
 
 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 | FileCheck %s
 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 | FileCheck %s
 
 define void @testSelect(i32 %a, i32 %b) {
 entry:
   %cmp = icmp slt i32 %a, %b
   %cond = select i1 %cmp, i32 %a, i32 %b
   tail call void @useInt(i32 %cond)
   %cmp1 = icmp sgt i32 %a, %b
   %cond2 = select i1 %cmp1, i32 10, i32 20
   tail call void @useInt(i32 %cond2)
+  ; Create "fake" uses of %cmp and %cmp1 to prevent O2 bool folding.
+  %d1 = zext i1 %cmp to i32
+  call void @useInt(i32 %d1)
+  %d2 = zext i1 %cmp1 to i32
+  call void @useInt(i32 %d2)
   ret void
 }
 
 declare void @useInt(i32 %x)
 
 ; CHECK-LABEL: testSelect
 ; CHECK:      cmp
 ; CHECK:      cmp
 ; CHECK:      call {{.*}} R_{{.*}} useInt
 ; CHECK:      cmp
@@ skipping 14 matching lines @@
 ; Check for valid addressing mode in the cmp instruction when the
 ; operand is an immediate.  There is a different x86-32 lowering
 ; sequence for 64-bit operands.
 define i64 @testSelectImm64(i64 %a, i64 %b) {
 entry:
   %cond = select i1 true, i64 %a, i64 %b
   ret i64 %cond
 }
 ; CHECK-LABEL: testSelectImm64
 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}},