Index: src/IceInstARM32.cpp |
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp |
new file mode 100644 |
index 0000000000000000000000000000000000000000..8c5711dc3005d4686d936f05acaa05f243fcb34e |
--- /dev/null |
+++ b/src/IceInstARM32.cpp |
@@ -0,0 +1,86 @@ |
+//===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
+// |
+// The Subzero Code Generator |
+// |
+// This file is distributed under the University of Illinois Open Source |
+// License. See LICENSE.TXT for details. |
+// |
+//===----------------------------------------------------------------------===// |
+// |
+// This file implements the InstARM32 and OperandARM32 classes, |
+// primarily the constructors and the dump()/emit() methods. |
+// |
+//===----------------------------------------------------------------------===// |
+ |
+#include "assembler_arm32.h" |
+#include "IceCfg.h" |
+#include "IceCfgNode.h" |
+#include "IceInst.h" |
+#include "IceInstARM32.h" |
+#include "IceRegistersARM32.h" |
+#include "IceTargetLoweringARM32.h" |
+#include "IceOperand.h" |
Jim Stichnoth
2015/05/11 20:12:31
sort includes
jvoung (off chromium)
2015/05/11 22:11:51
Done.
|
+ |
+namespace Ice { |
+ |
+namespace { |
+ |
+const struct TypeARM32Attributes_ { |
+ const char *WidthString; // b, h, <blank>, or d |
+} TypeARM32Attributes[] = { |
+#define X(tag, elementty, width) \ |
+ { width } \ |
+ , |
+ ICETYPEARM32_TABLE |
+#undef X |
+}; |
+ |
+} // end of anonymous namespace |
+ |
+const char *InstARM32::getWidthString(Type Ty) { |
+ return TypeARM32Attributes[Ty].WidthString; |
+} |
+ |
+InstARM32Ret::InstARM32Ret(Cfg *Func, Variable *LR, Variable *Source) |
+ : InstARM32(Func, InstARM32::Ret, Source ? 2 : 1, nullptr) { |
+ addSource(LR); |
+ if (Source) |
+ addSource(Source); |
+} |
+ |
+// ======================== Dump routines ======================== // |
+ |
+void InstARM32::dump(const Cfg *Func) const { |
+ if (!ALLOW_DUMP) |
+ return; |
+ Ostream &Str = Func->getContext()->getStrDump(); |
+ Str << "[ARM32] "; |
+ Inst::dump(Func); |
+} |
+ |
+void InstARM32Ret::emit(const Cfg *Func) const { |
+ if (!ALLOW_DUMP) |
+ return; |
+ assert(getSrcSize() > 0); |
+ Variable *LR = llvm::cast<Variable>(getSrc(0)); |
+ assert(LR->hasReg() && LR->getRegNum() == RegARM32::Reg_lr); |
Jim Stichnoth
2015/05/11 20:12:31
Break into 2 asserts? makes it easier to debug an
jvoung (off chromium)
2015/05/11 22:11:50
Done.
|
+ Ostream &Str = Func->getContext()->getStrEmit(); |
+ Str << "\tbx\t"; |
Jim Stichnoth
2015/05/11 20:12:31
Just to share an idle thought -- I was thinking of
jvoung (off chromium)
2015/05/11 22:11:51
Hmm yeah that sounds good.
|
+ LR->emit(Func); |
+} |
+ |
+void InstARM32Ret::emitIAS(const Cfg *Func) const { |
+ (void)Func; |
+ llvm_unreachable("Not yet implemented"); |
+} |
+ |
+void InstARM32Ret::dump(const Cfg *Func) const { |
+ if (!ALLOW_DUMP) |
+ return; |
+ Ostream &Str = Func->getContext()->getStrDump(); |
+ Type Ty = (getSrcSize() == 1 ? IceType_void : getSrc(0)->getType()); |
+ Str << "ret." << Ty << " "; |
+ dumpSources(Func); |
+} |
+ |
+} // end of namespace Ice |