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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 1136793002: Handle ARM "ret void" and function alignment with proper padding. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: note moved to cpp Created 5 years, 7 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
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502 } 502 }
503 503
504 void TargetX8632::emitVariable(const Variable *Var) const { 504 void TargetX8632::emitVariable(const Variable *Var) const {
505 Ostream &Str = Ctx->getStrEmit(); 505 Ostream &Str = Ctx->getStrEmit();
506 if (Var->hasReg()) { 506 if (Var->hasReg()) {
507 Str << "%" << getRegName(Var->getRegNum(), Var->getType()); 507 Str << "%" << getRegName(Var->getRegNum(), Var->getType());
508 return; 508 return;
509 } 509 }
510 if (Var->getWeight().isInf()) 510 if (Var->getWeight().isInf())
511 llvm_unreachable("Infinite-weight Variable has no register assigned"); 511 llvm_unreachable("Infinite-weight Variable has no register assigned");
512 const Type Ty = IceType_i32;
513 int32_t Offset = Var->getStackOffset(); 512 int32_t Offset = Var->getStackOffset();
514 if (!hasFramePointer()) 513 if (!hasFramePointer())
515 Offset += getStackAdjustment(); 514 Offset += getStackAdjustment();
516 if (Offset) 515 if (Offset)
517 Str << Offset; 516 Str << Offset;
518 Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")"; 517 const Type FrameSPTy = IceType_i32;
518 Str << "(%" << getRegName(getFrameOrStackReg(), FrameSPTy) << ")";
519 } 519 }
520 520
521 X8632::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const { 521 X8632::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
522 if (Var->hasReg()) 522 if (Var->hasReg())
523 llvm_unreachable("Stack Variable has a register assigned"); 523 llvm_unreachable("Stack Variable has a register assigned");
524 if (Var->getWeight().isInf()) 524 if (Var->getWeight().isInf())
525 llvm_unreachable("Infinite-weight Variable has no register assigned"); 525 llvm_unreachable("Infinite-weight Variable has no register assigned");
526 int32_t Offset = Var->getStackOffset(); 526 int32_t Offset = Var->getStackOffset();
527 if (!hasFramePointer()) 527 if (!hasFramePointer())
528 Offset += getStackAdjustment(); 528 Offset += getStackAdjustment();
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4874 case FT_Asm: 4874 case FT_Asm:
4875 case FT_Iasm: { 4875 case FT_Iasm: {
4876 OstreamLocker L(Ctx); 4876 OstreamLocker L(Ctx);
4877 emitConstantPool<PoolTypeConverter<float>>(Ctx); 4877 emitConstantPool<PoolTypeConverter<float>>(Ctx);
4878 emitConstantPool<PoolTypeConverter<double>>(Ctx); 4878 emitConstantPool<PoolTypeConverter<double>>(Ctx);
4879 } break; 4879 } break;
4880 } 4880 }
4881 } 4881 }
4882 4882
4883 } // end of namespace Ice 4883 } // end of namespace Ice
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