Roll src/third_party/boringssl/src 68de407:771a138

third_party/boringssl/linux-arm/crypto/sha/sha1-armv4-large.S

 #include "arm_arch.h"
 
 .text
 .code   32
 
-.global sha1_block_data_order
+.globl  sha1_block_data_order
 .type   sha1_block_data_order,%function
 
 .align  5
 sha1_block_data_order:
 #if __ARM_MAX_ARCH__>=7
         sub     r3,pc,#8                @ sha1_block_data_order
         ldr     r12,.LOPENSSL_armcap
         ldr     r12,[r3,r12]            @ OPENSSL_armcap_P
+#ifdef  __APPLE__
+        ldr     r12,[r12]
+#endif
         tst     r12,#ARMV8_SHA1
         bne     .LARMv8
         tst     r12,#ARMV7_NEON
         bne     .LNEON
 #endif
-        stmdb   sp!,{r4-r12,lr}
+        stmdb   sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
         add     r2,r1,r2,lsl#6  @ r2 to point at the end of r1
         ldmia   r0,{r3,r4,r5,r6,r7}
 .Lloop:
         ldr     r8,.LK_00_19
         mov     r14,sp
         sub     sp,sp,#15*4
         mov     r5,r5,ror#30
         mov     r6,r6,ror#30
         mov     r7,r7,ror#30            @ [6]
 .L_00_15:
@@ skipping 155 matching lines @@
         ldr     r11,[r14,#7*4]
         add     r6,r8,r6,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r4,r5                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r6,r6,r7,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r3,r10,ror#2                                    @ F_xx_xx
+        and     r10,r3,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r6,r6,r9                        @ E+=X[i]
         eor     r10,r10,r5,ror#2                @ F_00_19(B,C,D)
         add     r6,r6,r10                       @ E+=F_00_19(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r5,r8,r5,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r3,r4                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r5,r5,r6,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r7,r10,ror#2                                    @ F_xx_xx
+        and     r10,r7,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r5,r5,r9                        @ E+=X[i]
         eor     r10,r10,r4,ror#2                @ F_00_19(B,C,D)
         add     r5,r5,r10                       @ E+=F_00_19(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r4,r8,r4,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r7,r3                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r4,r4,r5,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r6,r10,ror#2                                    @ F_xx_xx
+        and     r10,r6,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r4,r4,r9                        @ E+=X[i]
         eor     r10,r10,r3,ror#2                @ F_00_19(B,C,D)
         add     r4,r4,r10                       @ E+=F_00_19(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r3,r8,r3,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r6,r7                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r3,r3,r4,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r5,r10,ror#2                                    @ F_xx_xx
+        and     r10,r5,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r3,r3,r9                        @ E+=X[i]
         eor     r10,r10,r7,ror#2                @ F_00_19(B,C,D)
         add     r3,r3,r10                       @ E+=F_00_19(B,C,D)
 
         ldr     r8,.LK_20_39            @ [+15+16*4]
         cmn     sp,#0                   @ [+3], clear carry to denote 20_39
 .L_20_39_or_60_79:
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r7,r8,r7,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r5,r6                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r7,r7,r3,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        eor r10,r4,r10,ror#2                                    @ F_xx_xx
+        eor     r10,r4,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r7,r7,r9                        @ E+=X[i]
         add     r7,r7,r10                       @ E+=F_20_39(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r6,r8,r6,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r4,r5                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r6,r6,r7,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        eor r10,r3,r10,ror#2                                    @ F_xx_xx
+        eor     r10,r3,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r6,r6,r9                        @ E+=X[i]
         add     r6,r6,r10                       @ E+=F_20_39(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r5,r8,r5,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r3,r4                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r5,r5,r6,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        eor r10,r7,r10,ror#2                                    @ F_xx_xx
+        eor     r10,r7,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r5,r5,r9                        @ E+=X[i]
         add     r5,r5,r10                       @ E+=F_20_39(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r4,r8,r4,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r7,r3                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r4,r4,r5,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        eor r10,r6,r10,ror#2                                    @ F_xx_xx
+        eor     r10,r6,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r4,r4,r9                        @ E+=X[i]
         add     r4,r4,r10                       @ E+=F_20_39(B,C,D)
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r3,r8,r3,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r6,r7                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r3,r3,r4,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        eor r10,r5,r10,ror#2                                    @ F_xx_xx
+        eor     r10,r5,r10,ror#2                                        @ F_xx_xx
                                                 @ F_xx_xx
         add     r3,r3,r9                        @ E+=X[i]
         add     r3,r3,r10                       @ E+=F_20_39(B,C,D)
         teq     r14,sp                  @ preserve carry
         bne     .L_20_39_or_60_79       @ [+((12+3)*5+2)*4]
         bcs     .L_done                 @ [+((12+3)*5+2)*4], spare 300 bytes
 
         ldr     r8,.LK_40_59
         sub     sp,sp,#20*4             @ [+2]
 .L_40_59:
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r7,r8,r7,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r5,r6                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r7,r7,r3,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r4,r10,ror#2                                    @ F_xx_xx
-        and r11,r5,r6                                   @ F_xx_xx
+        and     r10,r4,r10,ror#2                                        @ F_xx_xx
+        and     r11,r5,r6                                       @ F_xx_xx
         add     r7,r7,r9                        @ E+=X[i]
         add     r7,r7,r10                       @ E+=F_40_59(B,C,D)
         add     r7,r7,r11,ror#2
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r6,r8,r6,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r4,r5                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r6,r6,r7,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r3,r10,ror#2                                    @ F_xx_xx
-        and r11,r4,r5                                   @ F_xx_xx
+        and     r10,r3,r10,ror#2                                        @ F_xx_xx
+        and     r11,r4,r5                                       @ F_xx_xx
         add     r6,r6,r9                        @ E+=X[i]
         add     r6,r6,r10                       @ E+=F_40_59(B,C,D)
         add     r6,r6,r11,ror#2
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r5,r8,r5,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r3,r4                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r5,r5,r6,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r7,r10,ror#2                                    @ F_xx_xx
-        and r11,r3,r4                                   @ F_xx_xx
+        and     r10,r7,r10,ror#2                                        @ F_xx_xx
+        and     r11,r3,r4                                       @ F_xx_xx
         add     r5,r5,r9                        @ E+=X[i]
         add     r5,r5,r10                       @ E+=F_40_59(B,C,D)
         add     r5,r5,r11,ror#2
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r4,r8,r4,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r7,r3                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r4,r4,r5,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r6,r10,ror#2                                    @ F_xx_xx
-        and r11,r7,r3                                   @ F_xx_xx
+        and     r10,r6,r10,ror#2                                        @ F_xx_xx
+        and     r11,r7,r3                                       @ F_xx_xx
         add     r4,r4,r9                        @ E+=X[i]
         add     r4,r4,r10                       @ E+=F_40_59(B,C,D)
         add     r4,r4,r11,ror#2
         ldr     r9,[r14,#15*4]
         ldr     r10,[r14,#13*4]
         ldr     r11,[r14,#7*4]
         add     r3,r8,r3,ror#2                  @ E+=K_xx_xx
         ldr     r12,[r14,#2*4]
         eor     r9,r9,r10
         eor     r11,r11,r12                     @ 1 cycle stall
         eor     r10,r6,r7                       @ F_xx_xx
         mov     r9,r9,ror#31
         add     r3,r3,r4,ror#27                 @ E+=ROR(A,27)
         eor     r9,r9,r11,ror#31
         str     r9,[r14,#-4]!
-        and r10,r5,r10,ror#2                                    @ F_xx_xx
-        and r11,r6,r7                                   @ F_xx_xx
+        and     r10,r5,r10,ror#2                                        @ F_xx_xx
+        and     r11,r6,r7                                       @ F_xx_xx
         add     r3,r3,r9                        @ E+=X[i]
         add     r3,r3,r10                       @ E+=F_40_59(B,C,D)
         add     r3,r3,r11,ror#2
         teq     r14,sp
         bne     .L_40_59                @ [+((12+5)*5+2)*4]
 
         ldr     r8,.LK_60_79
         sub     sp,sp,#20*4
         cmp     sp,#0                   @ set carry to denote 60_79
         b       .L_20_39_or_60_79       @ [+4], spare 300 bytes
 .L_done:
         add     sp,sp,#80*4             @ "deallocate" stack frame
         ldmia   r0,{r8,r9,r10,r11,r12}
         add     r3,r8,r3
         add     r4,r9,r4
         add     r5,r10,r5,ror#2
         add     r6,r11,r6,ror#2
         add     r7,r12,r7,ror#2
         stmia   r0,{r3,r4,r5,r6,r7}
         teq     r1,r2
         bne     .Lloop                  @ [+18], total 1307
 
 #if __ARM_ARCH__>=5
-        ldmia   sp!,{r4-r12,pc}
+        ldmia   sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
 #else
-        ldmia   sp!,{r4-r12,lr}
+        ldmia   sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
         tst     lr,#1
         moveq   pc,lr                   @ be binary compatible with V4, yet
-        .word   0xe12fff1e                      @ interoperable with Thumb ISA:-)
+.word   0xe12fff1e                      @ interoperable with Thumb ISA:-)
 #endif
 .size   sha1_block_data_order,.-sha1_block_data_order
 
 .align  5
-.LK_00_19:      .word   0x5a827999
-.LK_20_39:      .word   0x6ed9eba1
-.LK_40_59:      .word   0x8f1bbcdc
-.LK_60_79:      .word   0xca62c1d6
+.LK_00_19:.word 0x5a827999
+.LK_20_39:.word 0x6ed9eba1
+.LK_40_59:.word 0x8f1bbcdc
+.LK_60_79:.word 0xca62c1d6
 #if __ARM_MAX_ARCH__>=7
 .LOPENSSL_armcap:
 .word   OPENSSL_armcap_P-sha1_block_data_order
 #endif
-.asciz  "SHA1 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by <appro@openssl.org>"
+.byte   83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,52,47,78,69,79,78,47,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
+.align  2
 .align  5
 #if __ARM_MAX_ARCH__>=7
 .arch   armv7-a
 .fpu    neon
 
 .type   sha1_block_data_order_neon,%function
 .align  4
 sha1_block_data_order_neon:
 .LNEON:
-        stmdb   sp!,{r4-r12,lr}
+        stmdb   sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
         add     r2,r1,r2,lsl#6  @ r2 to point at the end of r1
         @ dmb                           @ errata #451034 on early Cortex A8
         @ vstmdb        sp!,{d8-d15}    @ ABI specification says so
         mov     r14,sp
         sub     sp,sp,#64               @ alloca
         adr     r8,.LK_00_19
         bic     sp,sp,#15               @ align for 128-bit stores
 
         ldmia   r0,{r3,r4,r5,r6,r7}     @ load context
         mov     r12,sp
 
-        vld1.8          {q0-q1},[r1]!   @ handles unaligned
-        veor            q15,q15,q15
-        vld1.8          {q2-q3},[r1]!
-        vld1.32         {d28[],d29[]},[r8,:32]! @ load K_00_19
+        vld1.8  {q0,q1},[r1]!   @ handles unaligned
+        veor    q15,q15,q15
+        vld1.8  {q2,q3},[r1]!
+        vld1.32 {d28[],d29[]},[r8,:32]! @ load K_00_19
         vrev32.8        q0,q0           @ yes, even on
         vrev32.8        q1,q1           @ big-endian...
         vrev32.8        q2,q2
         vadd.i32        q8,q0,q14
         vrev32.8        q3,q3
         vadd.i32        q9,q1,q14
-        vst1.32         {q8},[r12,:128]!
+        vst1.32 {q8},[r12,:128]!
         vadd.i32        q10,q2,q14
-        vst1.32         {q9},[r12,:128]!
-        vst1.32         {q10},[r12,:128]!
-        ldr             r9,[sp]                 @ big RAW stall
+        vst1.32 {q9},[r12,:128]!
+        vst1.32 {q10},[r12,:128]!
+        ldr     r9,[sp]                 @ big RAW stall
 
 .Loop_neon:
         vext.8  q8,q0,q1,#8
         bic     r10,r6,r4
         add     r7,r7,r9
         and     r11,r5,r4
         vadd.i32        q13,q3,q14
         ldr     r9,[sp,#4]
         add     r7,r7,r3,ror#27
         vext.8  q12,q3,q15,#4
@@ skipping 657 matching lines @@
         mov     r6,r6,ror#2
         add     r4,r4,r11
         vadd.i32        q13,q3,q14
         eor     r10,r5,r7
         add     r3,r3,r9
         vst1.32 {q13},[r12,:128]!
         sub     r12,r12,#64
         teq     r1,r2
         sub     r8,r8,#16
         subeq   r1,r1,#64
-        vld1.8  {q0-q1},[r1]!
+        vld1.8  {q0,q1},[r1]!
         ldr     r9,[sp,#4]
         eor     r11,r10,r6
-        vld1.8  {q2-q3},[r1]!
+        vld1.8  {q2,q3},[r1]!
         add     r3,r3,r4,ror#27
         mov     r5,r5,ror#2
         vld1.32 {d28[],d29[]},[r8,:32]!
         add     r3,r3,r11
         eor     r10,r4,r6
         vrev32.8        q0,q0
         add     r7,r7,r9
         ldr     r9,[sp,#8]
         eor     r11,r10,r5
         add     r7,r7,r3,ror#27
@@ skipping 112 matching lines @@
         add     r5,r5,r11
         add     r6,r6,r12
         moveq   sp,r14
         add     r7,r7,r9
         ldrne   r9,[sp]
         stmia   r0,{r3,r4,r5,r6,r7}
         addne   r12,sp,#3*16
         bne     .Loop_neon
 
         @ vldmia        sp!,{d8-d15}
-        ldmia   sp!,{r4-r12,pc}
+        ldmia   sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
 .size   sha1_block_data_order_neon,.-sha1_block_data_order_neon
 #endif
 #if __ARM_MAX_ARCH__>=7
 .type   sha1_block_data_order_armv8,%function
 .align  5
 sha1_block_data_order_armv8:
 .LARMv8:
-        vstmdb  sp!,{d8-d15}            @ ABI specification says so
+        vstmdb  sp!,{d8,d9,d10,d11,d12,d13,d14,d15}             @ ABI specification says so
 
         veor    q1,q1,q1
         adr     r3,.LK_00_19
         vld1.32 {q0},[r0]!
         vld1.32 {d2[0]},[r0]
         sub     r0,r0,#16
         vld1.32 {d16[],d17[]},[r3,:32]!
         vld1.32 {d18[],d19[]},[r3,:32]!
         vld1.32 {d20[],d21[]},[r3,:32]!
         vld1.32 {d22[],d23[]},[r3,:32]
 
 .Loop_v8:
-        vld1.8          {q4-q5},[r1]!
-        vld1.8          {q6-q7},[r1]!
+        vld1.8  {q4,q5},[r1]!
+        vld1.8  {q6,q7},[r1]!
         vrev32.8        q4,q4
         vrev32.8        q5,q5
 
         vadd.i32        q12,q8,q4
         vrev32.8        q6,q6
-        vmov            q14,q0  @ offload
-        subs            r2,r2,#1
+        vmov    q14,q0  @ offload
+        subs    r2,r2,#1
 
         vadd.i32        q13,q8,q5
         vrev32.8        q7,q7
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 0
-        .byte   0x68,0x0c,0x02,0xf2     @ sha1c q0,q1,q12
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 0
+.byte   0x68,0x0c,0x02,0xf2     @ sha1c q0,q1,q12
         vadd.i32        q12,q8,q6
-        .byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 1
-        .byte   0x6a,0x0c,0x06,0xf2     @ sha1c q0,q3,q13
+.byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 1
+.byte   0x6a,0x0c,0x06,0xf2     @ sha1c q0,q3,q13
         vadd.i32        q13,q8,q7
-        .byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
-        .byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 2
-        .byte   0x68,0x0c,0x04,0xf2     @ sha1c q0,q2,q12
+.byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
+.byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 2
+.byte   0x68,0x0c,0x04,0xf2     @ sha1c q0,q2,q12
         vadd.i32        q12,q8,q4
-        .byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
-        .byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 3
-        .byte   0x6a,0x0c,0x06,0xf2     @ sha1c q0,q3,q13
+.byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
+.byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 3
+.byte   0x6a,0x0c,0x06,0xf2     @ sha1c q0,q3,q13
         vadd.i32        q13,q9,q5
-        .byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
-        .byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 4
-        .byte   0x68,0x0c,0x04,0xf2     @ sha1c q0,q2,q12
+.byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
+.byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 4
+.byte   0x68,0x0c,0x04,0xf2     @ sha1c q0,q2,q12
         vadd.i32        q12,q9,q6
-        .byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
-        .byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 5
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
+.byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 5
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
         vadd.i32        q13,q9,q7
-        .byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
-        .byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 6
-        .byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
+.byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
+.byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 6
+.byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
         vadd.i32        q12,q9,q4
-        .byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
-        .byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 7
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
+.byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 7
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
         vadd.i32        q13,q9,q5
-        .byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
-        .byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 8
-        .byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
+.byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
+.byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 8
+.byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
         vadd.i32        q12,q10,q6
-        .byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
-        .byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 9
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
+.byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 9
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
         vadd.i32        q13,q10,q7
-        .byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
-        .byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 10
-        .byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
+.byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
+.byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 10
+.byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
         vadd.i32        q12,q10,q4
-        .byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
-        .byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 11
-        .byte   0x6a,0x0c,0x26,0xf2     @ sha1m q0,q3,q13
+.byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
+.byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 11
+.byte   0x6a,0x0c,0x26,0xf2     @ sha1m q0,q3,q13
         vadd.i32        q13,q10,q5
-        .byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
-        .byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 12
-        .byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
+.byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
+.byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 12
+.byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
         vadd.i32        q12,q10,q6
-        .byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
-        .byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 13
-        .byte   0x6a,0x0c,0x26,0xf2     @ sha1m q0,q3,q13
+.byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
+.byte   0x4c,0x8c,0x3a,0xf2     @ sha1su0 q4,q5,q6
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 13
+.byte   0x6a,0x0c,0x26,0xf2     @ sha1m q0,q3,q13
         vadd.i32        q13,q11,q7
-        .byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
-        .byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 14
-        .byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
+.byte   0x8e,0x83,0xba,0xf3     @ sha1su1 q4,q7
+.byte   0x4e,0xac,0x3c,0xf2     @ sha1su0 q5,q6,q7
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 14
+.byte   0x68,0x0c,0x24,0xf2     @ sha1m q0,q2,q12
         vadd.i32        q12,q11,q4
-        .byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
-        .byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 15
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0x88,0xa3,0xba,0xf3     @ sha1su1 q5,q4
+.byte   0x48,0xcc,0x3e,0xf2     @ sha1su0 q6,q7,q4
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 15
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
         vadd.i32        q13,q11,q5
-        .byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
-        .byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 16
-        .byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
+.byte   0x8a,0xc3,0xba,0xf3     @ sha1su1 q6,q5
+.byte   0x4a,0xec,0x38,0xf2     @ sha1su0 q7,q4,q5
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 16
+.byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
         vadd.i32        q12,q11,q6
-        .byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 17
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0x8c,0xe3,0xba,0xf3     @ sha1su1 q7,q6
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 17
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
         vadd.i32        q13,q11,q7
 
-        .byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 18
-        .byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
+.byte   0xc0,0x62,0xb9,0xf3     @ sha1h q3,q0           @ 18
+.byte   0x68,0x0c,0x14,0xf2     @ sha1p q0,q2,q12
 
-        .byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 19
-        .byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
+.byte   0xc0,0x42,0xb9,0xf3     @ sha1h q2,q0           @ 19
+.byte   0x6a,0x0c,0x16,0xf2     @ sha1p q0,q3,q13
 
         vadd.i32        q1,q1,q2
         vadd.i32        q0,q0,q14
-        bne             .Loop_v8
+        bne     .Loop_v8
 
-        vst1.32         {q0},[r0]!
-        vst1.32         {d2[0]},[r0]
+        vst1.32 {q0},[r0]!
+        vst1.32 {d2[0]},[r0]
 
-        vldmia  sp!,{d8-d15}
+        vldmia  sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
         bx      lr                                      @ bx lr
 .size   sha1_block_data_order_armv8,.-sha1_block_data_order_armv8
 #endif
 #if __ARM_MAX_ARCH__>=7
 .comm   OPENSSL_armcap_P,4,4
 .hidden OPENSSL_armcap_P
 #endif