Update Yasm to 1.2.0 (Yasm Part 1/3)

third_party/yasm/patched-yasm/modules/arch/x86/x86expr.c

 /*
  * x86 expression handling
  *
  *  Copyright (C) 2001-2007  Peter Johnson
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS''
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE
  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <util.h>
-/*@unused@*/ RCSID("$Id: x86expr.c 2199 2009-05-10 05:24:46Z peter $");
 
 #include <libyasm.h>
 
 #include "x86arch.h"
 
 
 typedef struct x86_checkea_reg3264_data {
     int *regs;          /* total multiplier for each reg */
+    unsigned char vsib_mode;
     unsigned char bits;
     unsigned char addrsize;
 } x86_checkea_reg3264_data;
 
 /* Only works if ei->type == EXPR_REG (doesn't check).
  * Overwrites ei with intnum of 0 (to eliminate regs from the final expr).
  */
 static /*@null@*/ /*@dependent@*/ int *
 x86_expr_checkea_get_reg3264(yasm_expr__item *ei, int *regnum,
                              /*returned*/ void *d)
 {
     x86_checkea_reg3264_data *data = d;
 
     switch ((x86_expritem_reg_size)(ei->data.reg & ~0xFUL)) {
         case X86_REG32:
             if (data->addrsize != 32)
                 return 0;
             *regnum = (unsigned int)(ei->data.reg & 0xF);
             break;
         case X86_REG64:
             if (data->addrsize != 64)
                 return 0;
             *regnum = (unsigned int)(ei->data.reg & 0xF);
             break;
+        case X86_XMMREG:
+            if (data->vsib_mode != 1)
+                return 0;
+            if (data->bits != 64 && (ei->data.reg & 0x8) == 0x8)
+                return 0;
+            *regnum = 17+(unsigned int)(ei->data.reg & 0xF);
+            break;
+        case X86_YMMREG:
+            if (data->vsib_mode != 2)
+                return 0;
+            if (data->bits != 64 && (ei->data.reg & 0x8) == 0x8)
+                return 0;
+            *regnum = 17+(unsigned int)(ei->data.reg & 0xF);
+            break;
         case X86_RIP:
             if (data->bits != 64)
                 return 0;
             *regnum = 16;
             break;
         default:
             return 0;
     }
 
     /* overwrite with 0 to eliminate register from displacement expr */
@@ skipping 528 matching lines @@
                 /* Must be 32-bit in 16-bit or 32-bit modes.  In 64-bit mode,
                  * we don't know unless we look at the registers, except in the
                  * MemOffs case (see the end of this function).
                  */
                 if (bits != 64 || (!x86_ea->need_modrm && !x86_ea->need_sib)) {
                     *addrsize = 32;
                     break;
                 }
                 /*@fallthrough@*/
             default:
+                /* If SIB is required, but we're in 16-bit mode, set to 32. */
+                if (bits == 16 && x86_ea->need_sib == 1) {
+                    *addrsize = 32;
+                    break;
+                }
                 /* check for use of 16 or 32-bit registers; if none are used
                  * default to bits setting.
                  */
                 if (!x86_ea->ea.disp.abs ||
                     !yasm_expr__traverse_leaves_in(x86_ea->ea.disp.abs,
                         addrsize, x86_expr_checkea_getregsize_callback))
                     *addrsize = bits;
                 /* TODO: Add optional warning here if switched address size
                  * from bits setting just by register use.. eg [ax] in
                  * 32-bit mode would generate a warning.
@@ skipping 17 matching lines @@
             REG3264_ESI,
             REG3264_EDI,
             REG64_R8,
             REG64_R9,
             REG64_R10,
             REG64_R11,
             REG64_R12,
             REG64_R13,
             REG64_R14,
             REG64_R15,
-            REG64_RIP
+            REG64_RIP,
+            SIMDREGS
         } reg3264type;
-        int reg3264mult[17] = {0, 0, 0, 0, 0, 0, 0, 0,
-                               0, 0, 0, 0, 0, 0, 0, 0, 0};
+        int reg3264mult[33] =
+            {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+             0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
         x86_checkea_reg3264_data reg3264_data;
         int basereg = REG3264_NONE;     /* "base" register (for SIB) */
         int indexreg = REG3264_NONE;    /* "index" register (for SIB) */
+        int regcount = 17;              /* normally don't check SIMD regs */
+
+        if (x86_ea->vsib_mode != 0)
+            regcount = 33;
 
         /* We can only do 64-bit addresses in 64-bit mode. */
         if (*addrsize == 64 && bits != 64) {
             yasm_error_set(YASM_ERROR_TYPE,
                 N_("invalid effective address (64-bit in non-64-bit mode)"));
             return 1;
         }
 
         if (x86_ea->ea.pc_rel && bits != 64) {
             yasm_warn_set(YASM_WARN_GENERAL,
                 N_("RIP-relative directive ignored in non-64-bit mode"));
             x86_ea->ea.pc_rel = 0;
         }
 
         reg3264_data.regs = reg3264mult;
+        reg3264_data.vsib_mode = x86_ea->vsib_mode;
         reg3264_data.bits = bits;
         reg3264_data.addrsize = *addrsize;
         if (x86_ea->ea.disp.abs) {
             int pcrel = 0;
             switch (x86_expr_checkea_getregusage
                     (&x86_ea->ea.disp.abs, &indexreg, &pcrel, bits,
                      &reg3264_data, x86_expr_checkea_get_reg3264)) {
                 case 1:
                     yasm_error_set(YASM_ERROR_VALUE,
                                    N_("invalid effective address"));
@@ skipping 13 matching lines @@
          * This is possible because of the way indexreg is found in
          * expr_checkea_getregusage().
          */
         if (indexreg != REG3264_NONE && reg3264mult[indexreg] == 0)
             indexreg = REG3264_NONE;
 
         /* Find a basereg (*1, but not indexreg), if there is one.
          * Also, if an indexreg hasn't been assigned, try to find one.
          * Meanwhile, check to make sure there's no negative register mults.
          */
-        for (i=0; i<17; i++) {
+        for (i=0; i<regcount; i++) {
             if (reg3264mult[i] < 0) {
                 yasm_error_set(YASM_ERROR_VALUE,
                                N_("invalid effective address"));
                 return 1;
             }
             if (i != indexreg && reg3264mult[i] == 1 &&
                 basereg == REG3264_NONE)
                 basereg = i;
             else if (indexreg == REG3264_NONE && reg3264mult[i] > 0)
                 indexreg = i;
         }
 
-        /* Handle certain special cases of indexreg mults when basereg is
-         * empty.
-         */
-        if (indexreg != REG3264_NONE && basereg == REG3264_NONE)
+        if (x86_ea->vsib_mode != 0) {
+            /* For VSIB, the SIMD register needs to go into the indexreg.
+             * Also check basereg (must be a GPR if present) and indexreg
+             * (must be a SIMD register).
+             */
+            if (basereg >= SIMDREGS &&
+                (indexreg == REG3264_NONE || reg3264mult[indexreg] == 1)) {
+                int temp = basereg;
+                basereg = indexreg;
+                indexreg = temp;
+            }
+            if (basereg >= REG64_RIP || indexreg < SIMDREGS) {
+                yasm_error_set(YASM_ERROR_VALUE,
+                               N_("invalid effective address"));
+                return 1;
+            }
+        } else if (indexreg != REG3264_NONE && basereg == REG3264_NONE)
+            /* Handle certain special cases of indexreg mults when basereg is
+             * empty.
+             */
             switch (reg3264mult[indexreg]) {
                 case 1:
                     /* Only optimize this way if nosplit wasn't specified */
                     if (!x86_ea->ea.nosplit) {
                         basereg = indexreg;
                         indexreg = -1;
                     }
                     break;
                 case 2:
                     /* Only split if nosplit wasn't specified */
                     if (!x86_ea->ea.nosplit) {
                         basereg = indexreg;
                         reg3264mult[indexreg] = 1;
                     }
                     break;
                 case 3:
                 case 5:
                 case 9:
                     basereg = indexreg;
                     reg3264mult[indexreg]--;
                     break;
             }
 
         /* Make sure there's no other registers than the basereg and indexreg
          * we just found.
          */
-        for (i=0; i<17; i++)
+        for (i=0; i<regcount; i++)
             if (i != basereg && i != indexreg && reg3264mult[i] != 0) {
                 yasm_error_set(YASM_ERROR_VALUE,
                                N_("invalid effective address"));
                 return 1;
             }
 
         /* Check the index multiplier value for validity if present. */
         if (indexreg != REG3264_NONE && reg3264mult[indexreg] != 1 &&
             reg3264mult[indexreg] != 2 && reg3264mult[indexreg] != 4 &&
             reg3264mult[indexreg] != 8) {
@@ skipping 99 matching lines @@
                                                X86_REX_B))
                     return 1;
                 x86_ea->sib |= low3;
             }
             
             /* Put in indexreg, checking for none case */
             if (indexreg == REG3264_NONE)
                 x86_ea->sib |= 040;
                 /* Any scale field is valid, just leave at 0. */
             else {
-                if (yasm_x86__set_rex_from_reg(rex, &low3, (unsigned int)
-                                               (X86_REG64 | indexreg), bits,
-                                               X86_REX_X))
-                    return 1;
+                if (indexreg >= SIMDREGS) {
+                    if (yasm_x86__set_rex_from_reg(rex, &low3,
+                            (unsigned int)(X86_XMMREG | (indexreg-SIMDREGS)),
+                            bits, X86_REX_X))
+                        return 1;
+                } else {
+                    if (yasm_x86__set_rex_from_reg(rex, &low3,
+                            (unsigned int)(X86_REG64 | indexreg),
+                            bits, X86_REX_X))
+                        return 1;
+                }
                 x86_ea->sib |= low3 << 3;
                 /* Set scale field, 1 case -> 0, so don't bother. */
                 switch (reg3264mult[indexreg]) {
                     case 2:
                         x86_ea->sib |= 0100;
                         break;
                     case 4:
                         x86_ea->sib |= 0200;
                         break;
                     case 8:
@@ skipping 125 matching lines @@
 {
     if (!yasm_floatnum_check_size(flt, valsize)) {
         yasm_error_set(YASM_ERROR_FLOATING_POINT,
                        N_("invalid floating point constant size"));
         return 1;
     }
 
     yasm_floatnum_get_sized(flt, buf, destsize, valsize, shift, 0, warn);
     return 0;
 }