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1 # | 1 # |
2 # x86 CPU recognition | 2 # x86 CPU recognition |
3 # | 3 # |
4 # Copyright (C) 2002-2007 Peter Johnson | 4 # Copyright (C) 2002-2007 Peter Johnson |
5 # | 5 # |
6 # Redistribution and use in source and binary forms, with or without | 6 # Redistribution and use in source and binary forms, with or without |
7 # modification, are permitted provided that the following conditions | 7 # modification, are permitted provided that the following conditions |
8 # are met: | 8 # are met: |
9 # 1. Redistributions of source code must retain the above copyright | 9 # 1. Redistributions of source code must retain the above copyright |
10 # notice, this list of conditions and the following disclaimer. | 10 # notice, this list of conditions and the following disclaimer. |
11 # 2. Redistributions in binary form must reproduce the above copyright | 11 # 2. Redistributions in binary form must reproduce the above copyright |
12 # notice, this list of conditions and the following disclaimer in the | 12 # notice, this list of conditions and the following disclaimer in the |
13 # documentation and/or other materials provided with the distribution. | 13 # documentation and/or other materials provided with the distribution. |
14 # | 14 # |
15 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' | 15 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS'' |
16 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 16 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE | 18 # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE |
19 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | 19 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
20 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | 20 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
21 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 21 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
22 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 22 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
23 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 23 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
24 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 24 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
25 # POSSIBILITY OF SUCH DAMAGE. | 25 # POSSIBILITY OF SUCH DAMAGE. |
26 %{ | 26 %{ |
27 #include <util.h> | 27 #include <util.h> |
28 RCSID("$Id: x86cpu.gperf 2346 2010-08-01 01:37:37Z peter $"); | |
29 | 28 |
30 #include <ctype.h> | 29 #include <ctype.h> |
31 #include <libyasm.h> | 30 #include <libyasm.h> |
32 #include <libyasm/phash.h> | 31 #include <libyasm/phash.h> |
33 | 32 |
34 #include "modules/arch/x86/x86arch.h" | 33 #include "modules/arch/x86/x86arch.h" |
35 | 34 |
36 #define PROC_8086 0 | 35 #define PROC_8086 0 |
37 #define PROC_186 1 | 36 #define PROC_186 1 |
38 #define PROC_286 2 | 37 #define PROC_286 2 |
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382 fsgsbase, x86_cpu_set, CPU_FSGSBASE | 381 fsgsbase, x86_cpu_set, CPU_FSGSBASE |
383 nofsgsbase, x86_cpu_clear, CPU_FSGSBASE | 382 nofsgsbase, x86_cpu_clear, CPU_FSGSBASE |
384 rdrand, x86_cpu_set, CPU_RDRAND | 383 rdrand, x86_cpu_set, CPU_RDRAND |
385 nordrand, x86_cpu_clear, CPU_RDRAND | 384 nordrand, x86_cpu_clear, CPU_RDRAND |
386 xsaveopt, x86_cpu_set, CPU_XSAVEOPT | 385 xsaveopt, x86_cpu_set, CPU_XSAVEOPT |
387 noxsaveopt, x86_cpu_clear, CPU_XSAVEOPT | 386 noxsaveopt, x86_cpu_clear, CPU_XSAVEOPT |
388 eptvpid, x86_cpu_set, CPU_EPTVPID | 387 eptvpid, x86_cpu_set, CPU_EPTVPID |
389 noeptvpid, x86_cpu_clear, CPU_EPTVPID | 388 noeptvpid, x86_cpu_clear, CPU_EPTVPID |
390 smx, x86_cpu_set, CPU_SMX | 389 smx, x86_cpu_set, CPU_SMX |
391 nosmx, x86_cpu_clear, CPU_SMX | 390 nosmx, x86_cpu_clear, CPU_SMX |
| 391 avx2, x86_cpu_set, CPU_AVX2 |
| 392 noavx2, x86_cpu_clear, CPU_AVX2 |
| 393 bmi1, x86_cpu_set, CPU_BMI1 |
| 394 nobmi1, x86_cpu_clear, CPU_BMI1 |
| 395 bmi2, x86_cpu_set, CPU_BMI2 |
| 396 nobmi2, x86_cpu_clear, CPU_BMI2 |
| 397 invpcid, x86_cpu_set, CPU_INVPCID |
| 398 noinvpcid, x86_cpu_clear, CPU_INVPCID |
| 399 lzcnt, x86_cpu_set, CPU_LZCNT |
| 400 nolzcnt, x86_cpu_clear, CPU_LZCNT |
392 # Change NOP patterns | 401 # Change NOP patterns |
393 basicnop, x86_nop, X86_NOP_BASIC | 402 basicnop, x86_nop, X86_NOP_BASIC |
394 intelnop, x86_nop, X86_NOP_INTEL | 403 intelnop, x86_nop, X86_NOP_INTEL |
395 amdnop, x86_nop, X86_NOP_AMD | 404 amdnop, x86_nop, X86_NOP_AMD |
396 %% | 405 %% |
397 | 406 |
398 void | 407 void |
399 yasm_x86__parse_cpu(yasm_arch_x86 *arch_x86, const char *cpuid, | 408 yasm_x86__parse_cpu(yasm_arch_x86 *arch_x86, const char *cpuid, |
400 size_t cpuid_len) | 409 size_t cpuid_len) |
401 { | 410 { |
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429 } | 438 } |
430 } | 439 } |
431 | 440 |
432 /* not found, need to add a new entry */ | 441 /* not found, need to add a new entry */ |
433 arch_x86->active_cpu = arch_x86->cpu_enables_size++; | 442 arch_x86->active_cpu = arch_x86->cpu_enables_size++; |
434 arch_x86->cpu_enables = | 443 arch_x86->cpu_enables = |
435 yasm_xrealloc(arch_x86->cpu_enables, | 444 yasm_xrealloc(arch_x86->cpu_enables, |
436 arch_x86->cpu_enables_size*sizeof(wordptr)); | 445 arch_x86->cpu_enables_size*sizeof(wordptr)); |
437 arch_x86->cpu_enables[arch_x86->active_cpu] = new_cpu; | 446 arch_x86->cpu_enables[arch_x86->active_cpu] = new_cpu; |
438 } | 447 } |
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