Update Yasm to 1.2.0 (Yasm Part 1/3)

third_party/yasm/patched-yasm/modules/arch/x86/x86arch.h

-/* $Id: x86arch.h 2346 2010-08-01 01:37:37Z peter $
+/*
  * x86 Architecture header file
  *
  *  Copyright (C) 2001-2007  Peter Johnson
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
@@ skipping 59 matching lines @@
 #define CPU_CLMUL   37      /* PCLMULQDQ instruction */
 #define CPU_MOVBE   38      /* MOVBE instruction */
 #define CPU_XOP     39      /* AMD XOP extensions */
 #define CPU_FMA4    40      /* AMD Fused-Multiply-Add extensions */
 #define CPU_F16C    41      /* Intel float-16 instructions */
 #define CPU_FSGSBASE 42     /* Intel FSGSBASE instructions */
 #define CPU_RDRAND  43      /* Intel RDRAND instruction */
 #define CPU_XSAVEOPT 44     /* Intel XSAVEOPT instruction */
 #define CPU_EPTVPID 45      /* Intel INVEPT, INVVPID instructions */
 #define CPU_SMX     46      /* Intel SMX instruction (GETSEC) */
+#define CPU_AVX2    47      /* Intel AVX2 instructions */
+#define CPU_BMI1    48      /* Intel BMI1 instructions */
+#define CPU_BMI2    49      /* Intel BMI2 instructions */
+#define CPU_INVPCID 50      /* Intel INVPCID instruction */
+#define CPU_LZCNT   51      /* Intel LZCNT instruction */
 
 enum x86_parser_type {
     X86_PARSER_NASM = 0,
     X86_PARSER_TASM = 1,
     X86_PARSER_GAS = 2
 };
 
 #define PARSER(arch) (((arch)->parser == X86_PARSER_GAS && (arch)->gas_intel_mode) ? X86_PARSER_NASM : (arch)->parser)
 
 typedef struct yasm_arch_x86 {
@@ skipping 74 matching lines @@
  * in 64-bit mode or if it wasn't needed to express reg.
  */
 int yasm_x86__set_rex_from_reg(unsigned char *rex, unsigned char *low3,
                                uintptr_t reg, unsigned int bits,
                                x86_rex_bit_pos rexbit);
 
 /* Effective address type */
 typedef struct x86_effaddr {
     yasm_effaddr ea;            /* base structure */
 
+    /* VSIB uses the normal SIB byte, but this flag enables it. */
+    unsigned char vsib_mode;    /* 0 if not, 1 if XMM, 2 if YMM */
+
     /* How the spare (register) bits in Mod/RM are handled:
      * Even if valid_modrm=0, the spare bits are still valid (don't overwrite!)
      * They're set in bytecode_create_insn().
      */
     unsigned char modrm;
     unsigned char valid_modrm;  /* 1 if Mod/RM byte currently valid, 0 if not */
     unsigned char need_modrm;   /* 1 if Mod/RM byte needed, 0 if not */
 
     unsigned char sib;
     unsigned char valid_sib;    /* 1 if SIB byte currently valid, 0 if not */
@@ skipping 123 matching lines @@
 int yasm_x86__intnum_tobytes
     (yasm_arch *arch, const yasm_intnum *intn, unsigned char *buf,
      size_t destsize, size_t valsize, int shift, const yasm_bytecode *bc,
      int warn);
 
 unsigned int yasm_x86__get_reg_size(uintptr_t reg);
 
 /*@only@*/ yasm_bytecode *yasm_x86__create_empty_insn(yasm_arch *arch,
                                                       unsigned long line);
 #endif