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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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397 // On MIPS we have only one adressing mode with base_reg + offset. | 397 // On MIPS we have only one adressing mode with base_reg + offset. |
398 // Class MemOperand represents a memory operand in load and store instructions. | 398 // Class MemOperand represents a memory operand in load and store instructions. |
399 class MemOperand : public Operand { | 399 class MemOperand : public Operand { |
400 public: | 400 public: |
401 // Immediate value attached to offset. | 401 // Immediate value attached to offset. |
402 enum OffsetAddend { | 402 enum OffsetAddend { |
403 offset_minus_one = -1, | 403 offset_minus_one = -1, |
404 offset_zero = 0 | 404 offset_zero = 0 |
405 }; | 405 }; |
406 | 406 |
407 explicit MemOperand(Register rn, int64_t offset = 0); | 407 explicit MemOperand(Register rn, int32_t offset = 0); |
408 explicit MemOperand(Register rn, int64_t unit, int64_t multiplier, | 408 explicit MemOperand(Register rn, int32_t unit, int32_t multiplier, |
409 OffsetAddend offset_addend = offset_zero); | 409 OffsetAddend offset_addend = offset_zero); |
410 int32_t offset() const { return offset_; } | 410 int32_t offset() const { return offset_; } |
411 | 411 |
412 bool OffsetIsInt16Encodable() const { | 412 bool OffsetIsInt16Encodable() const { |
413 return is_int16(offset_); | 413 return is_int16(offset_); |
414 } | 414 } |
415 | 415 |
416 private: | 416 private: |
417 int32_t offset_; | 417 int32_t offset_; |
418 | 418 |
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1131 // Postpone the generation of the trampoline pool for the specified number of | 1131 // Postpone the generation of the trampoline pool for the specified number of |
1132 // instructions. | 1132 // instructions. |
1133 void BlockTrampolinePoolFor(int instructions); | 1133 void BlockTrampolinePoolFor(int instructions); |
1134 | 1134 |
1135 // Check if there is less than kGap bytes available in the buffer. | 1135 // Check if there is less than kGap bytes available in the buffer. |
1136 // If this is the case, we need to grow the buffer before emitting | 1136 // If this is the case, we need to grow the buffer before emitting |
1137 // an instruction or relocation information. | 1137 // an instruction or relocation information. |
1138 inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } | 1138 inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; } |
1139 | 1139 |
1140 // Get the number of bytes available in the buffer. | 1140 // Get the number of bytes available in the buffer. |
1141 inline int available_space() const { return reloc_info_writer.pos() - pc_; } | 1141 inline intptr_t available_space() const { |
| 1142 return reloc_info_writer.pos() - pc_; |
| 1143 } |
1142 | 1144 |
1143 // Read/patch instructions. | 1145 // Read/patch instructions. |
1144 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } | 1146 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } |
1145 static void instr_at_put(byte* pc, Instr instr) { | 1147 static void instr_at_put(byte* pc, Instr instr) { |
1146 *reinterpret_cast<Instr*>(pc) = instr; | 1148 *reinterpret_cast<Instr*>(pc) = instr; |
1147 } | 1149 } |
1148 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } | 1150 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } |
1149 void instr_at_put(int pos, Instr instr) { | 1151 void instr_at_put(int pos, Instr instr) { |
1150 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; | 1152 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; |
1151 } | 1153 } |
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1483 class EnsureSpace BASE_EMBEDDED { | 1485 class EnsureSpace BASE_EMBEDDED { |
1484 public: | 1486 public: |
1485 explicit EnsureSpace(Assembler* assembler) { | 1487 explicit EnsureSpace(Assembler* assembler) { |
1486 assembler->CheckBuffer(); | 1488 assembler->CheckBuffer(); |
1487 } | 1489 } |
1488 }; | 1490 }; |
1489 | 1491 |
1490 } } // namespace v8::internal | 1492 } } // namespace v8::internal |
1491 | 1493 |
1492 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1494 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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