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Issue 1133163005: MIPS64: Enable shorten-64-to-32 warning. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix type related to mach_timespec. Created 5 years, 6 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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204 imm64_ = reinterpret_cast<intptr_t>(handle.location()); 204 imm64_ = reinterpret_cast<intptr_t>(handle.location());
205 rmode_ = RelocInfo::EMBEDDED_OBJECT; 205 rmode_ = RelocInfo::EMBEDDED_OBJECT;
206 } else { 206 } else {
207 // No relocation needed. 207 // No relocation needed.
208 imm64_ = reinterpret_cast<intptr_t>(obj); 208 imm64_ = reinterpret_cast<intptr_t>(obj);
209 rmode_ = RelocInfo::NONE64; 209 rmode_ = RelocInfo::NONE64;
210 } 210 }
211 } 211 }
212 212
213 213
214 MemOperand::MemOperand(Register rm, int64_t offset) : Operand(rm) { 214 MemOperand::MemOperand(Register rm, int32_t offset) : Operand(rm) {
215 offset_ = offset; 215 offset_ = offset;
216 } 216 }
217 217
218 218
219 MemOperand::MemOperand(Register rm, int64_t unit, int64_t multiplier, 219 MemOperand::MemOperand(Register rm, int32_t unit, int32_t multiplier,
220 OffsetAddend offset_addend) : Operand(rm) { 220 OffsetAddend offset_addend)
221 : Operand(rm) {
221 offset_ = unit * multiplier + offset_addend; 222 offset_ = unit * multiplier + offset_addend;
222 } 223 }
223 224
224 225
225 // ----------------------------------------------------------------------------- 226 // -----------------------------------------------------------------------------
226 // Specific instructions, constants, and masks. 227 // Specific instructions, constants, and masks.
227 228
228 static const int kNegOffset = 0x00008000; 229 static const int kNegOffset = 0x00008000;
229 // daddiu(sp, sp, 8) aka Pop() operation or part of Pop(r) 230 // daddiu(sp, sp, 8) aka Pop() operation or part of Pop(r)
230 // operations as post-increment of sp. 231 // operations as post-increment of sp.
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283 ClearRecordedAstId(); 284 ClearRecordedAstId();
284 } 285 }
285 286
286 287
287 void Assembler::GetCode(CodeDesc* desc) { 288 void Assembler::GetCode(CodeDesc* desc) {
288 DCHECK(pc_ <= reloc_info_writer.pos()); // No overlap. 289 DCHECK(pc_ <= reloc_info_writer.pos()); // No overlap.
289 // Set up code descriptor. 290 // Set up code descriptor.
290 desc->buffer = buffer_; 291 desc->buffer = buffer_;
291 desc->buffer_size = buffer_size_; 292 desc->buffer_size = buffer_size_;
292 desc->instr_size = pc_offset(); 293 desc->instr_size = pc_offset();
293 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); 294 desc->reloc_size =
295 static_cast<int>((buffer_ + buffer_size_) - reloc_info_writer.pos());
294 desc->origin = this; 296 desc->origin = this;
295 } 297 }
296 298
297 299
298 void Assembler::Align(int m) { 300 void Assembler::Align(int m) {
299 DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m)); 301 DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m));
300 while ((pc_offset() & (m - 1)) != 0) { 302 while ((pc_offset() & (m - 1)) != 0) {
301 nop(); 303 nop();
302 } 304 }
303 } 305 }
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734 instr_ori | ((imm >> 16) & kImm16Mask)); 736 instr_ori | ((imm >> 16) & kImm16Mask));
735 instr_at_put(pos + 3 * Assembler::kInstrSize, 737 instr_at_put(pos + 3 * Assembler::kInstrSize,
736 instr_ori2 | (imm & kImm16Mask)); 738 instr_ori2 | (imm & kImm16Mask));
737 } else { 739 } else {
738 DCHECK(IsJ(instr) || IsJal(instr)); 740 DCHECK(IsJ(instr) || IsJal(instr));
739 uint64_t imm28 = reinterpret_cast<uint64_t>(buffer_) + target_pos; 741 uint64_t imm28 = reinterpret_cast<uint64_t>(buffer_) + target_pos;
740 imm28 &= kImm28Mask; 742 imm28 &= kImm28Mask;
741 DCHECK((imm28 & 3) == 0); 743 DCHECK((imm28 & 3) == 0);
742 744
743 instr &= ~kImm26Mask; 745 instr &= ~kImm26Mask;
744 uint32_t imm26 = imm28 >> 2; 746 uint32_t imm26 = static_cast<uint32_t>(imm28 >> 2);
745 DCHECK(is_uint26(imm26)); 747 DCHECK(is_uint26(imm26));
746 748
747 instr_at_put(pos, instr | (imm26 & kImm26Mask)); 749 instr_at_put(pos, instr | (imm26 & kImm26Mask));
748 } 750 }
749 } 751 }
750 752
751 753
752 void Assembler::print(Label* L) { 754 void Assembler::print(Label* L) {
753 if (L->is_unused()) { 755 if (L->is_unused()) {
754 PrintF("unused label\n"); 756 PrintF("unused label\n");
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1378 void Assembler::j(int64_t target) { 1380 void Assembler::j(int64_t target) {
1379 #if DEBUG 1381 #if DEBUG
1380 // Get pc of delay slot. 1382 // Get pc of delay slot.
1381 if (target != kEndOfJumpChain) { 1383 if (target != kEndOfJumpChain) {
1382 uint64_t ipc = reinterpret_cast<uint64_t>(pc_ + 1 * kInstrSize); 1384 uint64_t ipc = reinterpret_cast<uint64_t>(pc_ + 1 * kInstrSize);
1383 bool in_range = ((ipc ^ static_cast<uint64_t>(target)) >> 1385 bool in_range = ((ipc ^ static_cast<uint64_t>(target)) >>
1384 (kImm26Bits + kImmFieldShift)) == 0; 1386 (kImm26Bits + kImmFieldShift)) == 0;
1385 DCHECK(in_range && ((target & 3) == 0)); 1387 DCHECK(in_range && ((target & 3) == 0));
1386 } 1388 }
1387 #endif 1389 #endif
1388 GenInstrJump(J, (target >> 2) & kImm26Mask); 1390 GenInstrJump(J, static_cast<uint32_t>(target >> 2) & kImm26Mask);
1389 } 1391 }
1390 1392
1391 1393
1392 void Assembler::jr(Register rs) { 1394 void Assembler::jr(Register rs) {
1393 if (kArchVariant != kMips64r6) { 1395 if (kArchVariant != kMips64r6) {
1394 BlockTrampolinePoolScope block_trampoline_pool(this); 1396 BlockTrampolinePoolScope block_trampoline_pool(this);
1395 if (rs.is(ra)) { 1397 if (rs.is(ra)) {
1396 positions_recorder()->WriteRecordedPositions(); 1398 positions_recorder()->WriteRecordedPositions();
1397 } 1399 }
1398 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); 1400 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);
1399 BlockTrampolinePoolFor(1); // For associated delay slot. 1401 BlockTrampolinePoolFor(1); // For associated delay slot.
1400 } else { 1402 } else {
1401 jalr(rs, zero_reg); 1403 jalr(rs, zero_reg);
1402 } 1404 }
1403 } 1405 }
1404 1406
1405 1407
1406 void Assembler::jal(int64_t target) { 1408 void Assembler::jal(int64_t target) {
1407 #ifdef DEBUG 1409 #ifdef DEBUG
1408 // Get pc of delay slot. 1410 // Get pc of delay slot.
1409 if (target != kEndOfJumpChain) { 1411 if (target != kEndOfJumpChain) {
1410 uint64_t ipc = reinterpret_cast<uint64_t>(pc_ + 1 * kInstrSize); 1412 uint64_t ipc = reinterpret_cast<uint64_t>(pc_ + 1 * kInstrSize);
1411 bool in_range = ((ipc ^ static_cast<uint64_t>(target)) >> 1413 bool in_range = ((ipc ^ static_cast<uint64_t>(target)) >>
1412 (kImm26Bits + kImmFieldShift)) == 0; 1414 (kImm26Bits + kImmFieldShift)) == 0;
1413 DCHECK(in_range && ((target & 3) == 0)); 1415 DCHECK(in_range && ((target & 3) == 0));
1414 } 1416 }
1415 #endif 1417 #endif
1416 positions_recorder()->WriteRecordedPositions(); 1418 positions_recorder()->WriteRecordedPositions();
1417 GenInstrJump(JAL, (target >> 2) & kImm26Mask); 1419 GenInstrJump(JAL, static_cast<uint32_t>(target >> 2) & kImm26Mask);
1418 } 1420 }
1419 1421
1420 1422
1421 void Assembler::jalr(Register rs, Register rd) { 1423 void Assembler::jalr(Register rs, Register rd) {
1422 BlockTrampolinePoolScope block_trampoline_pool(this); 1424 BlockTrampolinePoolScope block_trampoline_pool(this);
1423 positions_recorder()->WriteRecordedPositions(); 1425 positions_recorder()->WriteRecordedPositions();
1424 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR); 1426 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);
1425 BlockTrampolinePoolFor(1); // For associated delay slot. 1427 BlockTrampolinePoolFor(1); // For associated delay slot.
1426 } 1428 }
1427 1429
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2894 desc.buffer_size = 2*buffer_size_; 2896 desc.buffer_size = 2*buffer_size_;
2895 } else { 2897 } else {
2896 desc.buffer_size = buffer_size_ + 1*MB; 2898 desc.buffer_size = buffer_size_ + 1*MB;
2897 } 2899 }
2898 CHECK_GT(desc.buffer_size, 0); // No overflow. 2900 CHECK_GT(desc.buffer_size, 0); // No overflow.
2899 2901
2900 // Set up new buffer. 2902 // Set up new buffer.
2901 desc.buffer = NewArray<byte>(desc.buffer_size); 2903 desc.buffer = NewArray<byte>(desc.buffer_size);
2902 2904
2903 desc.instr_size = pc_offset(); 2905 desc.instr_size = pc_offset();
2904 desc.reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); 2906 desc.reloc_size =
2907 static_cast<int>((buffer_ + buffer_size_) - reloc_info_writer.pos());
2905 2908
2906 // Copy the data. 2909 // Copy the data.
2907 intptr_t pc_delta = desc.buffer - buffer_; 2910 intptr_t pc_delta = desc.buffer - buffer_;
2908 intptr_t rc_delta = (desc.buffer + desc.buffer_size) - 2911 intptr_t rc_delta = (desc.buffer + desc.buffer_size) -
2909 (buffer_ + buffer_size_); 2912 (buffer_ + buffer_size_);
2910 MemMove(desc.buffer, buffer_, desc.instr_size); 2913 MemMove(desc.buffer, buffer_, desc.instr_size);
2911 MemMove(reloc_info_writer.pos() + rc_delta, 2914 MemMove(reloc_info_writer.pos() + rc_delta,
2912 reloc_info_writer.pos(), desc.reloc_size); 2915 reloc_info_writer.pos(), desc.reloc_size);
2913 2916
2914 // Switch buffers. 2917 // Switch buffers.
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3152 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { 3155 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
3153 CpuFeatures::FlushICache(pc, 4 * Assembler::kInstrSize); 3156 CpuFeatures::FlushICache(pc, 4 * Assembler::kInstrSize);
3154 } 3157 }
3155 } 3158 }
3156 3159
3157 3160
3158 } // namespace internal 3161 } // namespace internal
3159 } // namespace v8 3162 } // namespace v8
3160 3163
3161 #endif // V8_TARGET_ARCH_MIPS64 3164 #endif // V8_TARGET_ARCH_MIPS64
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