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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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486 // The high 8 bits are set to zero. | 486 // The high 8 bits are set to zero. |
487 void label_at_put(Label* L, int at_offset); | 487 void label_at_put(Label* L, int at_offset); |
488 | 488 |
489 // Read/Modify the code target address in the branch/call instruction at pc. | 489 // Read/Modify the code target address in the branch/call instruction at pc. |
490 static Address target_address_at(Address pc); | 490 static Address target_address_at(Address pc); |
491 static void set_target_address_at(Address pc, | 491 static void set_target_address_at(Address pc, |
492 Address target, | 492 Address target, |
493 ICacheFlushMode icache_flush_mode = | 493 ICacheFlushMode icache_flush_mode = |
494 FLUSH_ICACHE_IF_NEEDED); | 494 FLUSH_ICACHE_IF_NEEDED); |
495 // On MIPS there is no Constant Pool so we skip that parameter. | 495 // On MIPS there is no Constant Pool so we skip that parameter. |
496 INLINE(static Address target_address_at(Address pc, | 496 INLINE(static Address target_address_at(Address pc, Address constant_pool)) { |
497 ConstantPoolArray* constant_pool)) { | |
498 return target_address_at(pc); | 497 return target_address_at(pc); |
499 } | 498 } |
500 INLINE(static void set_target_address_at(Address pc, | 499 INLINE(static void set_target_address_at( |
501 ConstantPoolArray* constant_pool, | 500 Address pc, Address constant_pool, Address target, |
502 Address target, | 501 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) { |
503 ICacheFlushMode icache_flush_mode = | |
504 FLUSH_ICACHE_IF_NEEDED)) { | |
505 set_target_address_at(pc, target, icache_flush_mode); | 502 set_target_address_at(pc, target, icache_flush_mode); |
506 } | 503 } |
507 INLINE(static Address target_address_at(Address pc, Code* code)) { | 504 INLINE(static Address target_address_at(Address pc, Code* code)) { |
508 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 505 Address constant_pool = code ? code->constant_pool() : NULL; |
509 return target_address_at(pc, constant_pool); | 506 return target_address_at(pc, constant_pool); |
510 } | 507 } |
511 INLINE(static void set_target_address_at(Address pc, | 508 INLINE(static void set_target_address_at(Address pc, |
512 Code* code, | 509 Code* code, |
513 Address target, | 510 Address target, |
514 ICacheFlushMode icache_flush_mode = | 511 ICacheFlushMode icache_flush_mode = |
515 FLUSH_ICACHE_IF_NEEDED)) { | 512 FLUSH_ICACHE_IF_NEEDED)) { |
516 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 513 Address constant_pool = code ? code->constant_pool() : NULL; |
517 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 514 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
518 } | 515 } |
519 | 516 |
520 // Return the code target address at a call site from the return address | 517 // Return the code target address at a call site from the return address |
521 // of that call in the instruction stream. | 518 // of that call in the instruction stream. |
522 inline static Address target_address_from_return_address(Address pc); | 519 inline static Address target_address_from_return_address(Address pc); |
523 | 520 |
524 // Return the code target address of the patch debug break slot | 521 // Return the code target address of the patch debug break slot |
525 inline static Address break_address_from_return_address(Address pc); | 522 inline static Address break_address_from_return_address(Address pc); |
526 | 523 |
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1081 // Use --trace-deopt to enable. | 1078 // Use --trace-deopt to enable. |
1082 void RecordDeoptReason(const int reason, const SourcePosition position); | 1079 void RecordDeoptReason(const int reason, const SourcePosition position); |
1083 | 1080 |
1084 static int RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, | 1081 static int RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, |
1085 intptr_t pc_delta); | 1082 intptr_t pc_delta); |
1086 | 1083 |
1087 // Writes a single byte or word of data in the code stream. Used for | 1084 // Writes a single byte or word of data in the code stream. Used for |
1088 // inline tables, e.g., jump-tables. | 1085 // inline tables, e.g., jump-tables. |
1089 void db(uint8_t data); | 1086 void db(uint8_t data); |
1090 void dd(uint32_t data); | 1087 void dd(uint32_t data); |
| 1088 void dq(uint64_t data); |
| 1089 void dp(uintptr_t data) { dq(data); } |
1091 void dd(Label* label); | 1090 void dd(Label* label); |
1092 | 1091 |
1093 // Emits the address of the code stub's first instruction. | 1092 // Emits the address of the code stub's first instruction. |
1094 void emit_code_stub_address(Code* stub); | 1093 void emit_code_stub_address(Code* stub); |
1095 | 1094 |
1096 PositionsRecorder* positions_recorder() { return &positions_recorder_; } | 1095 PositionsRecorder* positions_recorder() { return &positions_recorder_; } |
1097 | 1096 |
1098 // Postpone the generation of the trampoline pool for the specified number of | 1097 // Postpone the generation of the trampoline pool for the specified number of |
1099 // instructions. | 1098 // instructions. |
1100 void BlockTrampolinePoolFor(int instructions); | 1099 void BlockTrampolinePoolFor(int instructions); |
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1165 static bool IsSw(Instr instr); | 1164 static bool IsSw(Instr instr); |
1166 static Instr SetSwOffset(Instr instr, int16_t offset); | 1165 static Instr SetSwOffset(Instr instr, int16_t offset); |
1167 static bool IsAddImmediate(Instr instr); | 1166 static bool IsAddImmediate(Instr instr); |
1168 static Instr SetAddImmediateOffset(Instr instr, int16_t offset); | 1167 static Instr SetAddImmediateOffset(Instr instr, int16_t offset); |
1169 | 1168 |
1170 static bool IsAndImmediate(Instr instr); | 1169 static bool IsAndImmediate(Instr instr); |
1171 static bool IsEmittedConstant(Instr instr); | 1170 static bool IsEmittedConstant(Instr instr); |
1172 | 1171 |
1173 void CheckTrampolinePool(); | 1172 void CheckTrampolinePool(); |
1174 | 1173 |
1175 // Allocate a constant pool of the correct size for the generated code. | 1174 void SetConstantPoolOffset(int pos, int offset, |
1176 Handle<ConstantPoolArray> NewConstantPool(Isolate* isolate); | 1175 ConstantPoolEntry::Access access, |
1177 | 1176 ConstantPoolEntry::Type type) { |
1178 // Generate the constant pool for the generated code. | 1177 // No embedded constant pool support. |
1179 void PopulateConstantPool(ConstantPoolArray* constant_pool); | 1178 UNREACHABLE(); |
| 1179 } |
1180 | 1180 |
1181 protected: | 1181 protected: |
1182 // Relocation for a type-recording IC has the AST id added to it. This | 1182 // Relocation for a type-recording IC has the AST id added to it. This |
1183 // member variable is a way to pass the information from the call site to | 1183 // member variable is a way to pass the information from the call site to |
1184 // the relocation info. | 1184 // the relocation info. |
1185 TypeFeedbackId recorded_ast_id_; | 1185 TypeFeedbackId recorded_ast_id_; |
1186 | 1186 |
1187 inline static void set_target_internal_reference_encoded_at(Address pc, | 1187 inline static void set_target_internal_reference_encoded_at(Address pc, |
1188 Address target); | 1188 Address target); |
1189 | 1189 |
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1449 class EnsureSpace BASE_EMBEDDED { | 1449 class EnsureSpace BASE_EMBEDDED { |
1450 public: | 1450 public: |
1451 explicit EnsureSpace(Assembler* assembler) { | 1451 explicit EnsureSpace(Assembler* assembler) { |
1452 assembler->CheckBuffer(); | 1452 assembler->CheckBuffer(); |
1453 } | 1453 } |
1454 }; | 1454 }; |
1455 | 1455 |
1456 } } // namespace v8::internal | 1456 } } // namespace v8::internal |
1457 | 1457 |
1458 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1458 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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