gpu: don't try to discard/recreate backbuffer while draws are deferred.

content/common/gpu/gpu_channel.h

 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef CONTENT_COMMON_GPU_GPU_CHANNEL_H_
 #define CONTENT_COMMON_GPU_GPU_CHANNEL_H_
 
 #include <deque>
 #include <string>
 #include <vector>
@@ skipping 72 matching lines @@
 
   base::ProcessId renderer_pid() const { return channel_->peer_pid(); }
 
   // IPC::Listener implementation:
   virtual bool OnMessageReceived(const IPC::Message& msg) OVERRIDE;
   virtual void OnChannelError() OVERRIDE;
 
   // IPC::Sender implementation:
   virtual bool Send(IPC::Message* msg) OVERRIDE;
 
+  // Requeue the message that is currently being processed to the beginning of
+  // the queue. Used when the processing of a message gets aborted because of
+  // unscheduling conditions.
+  void RequeueMessage();
+
   // This is called when a command buffer transitions from the unscheduled
   // state to the scheduled state, which potentially means the channel
   // transitions from the unscheduled to the scheduled state. When this occurs
   // deferred IPC messaged are handled.
   void OnScheduled();
 
   void CreateViewCommandBuffer(
       const gfx::GLSurfaceHandle& window,
       int32 surface_id,
       const GPUCreateCommandBufferConfig& init_params,
@@ skipping 109 matching lines @@
   typedef IDMap<GpuCommandBufferStub, IDMapOwnPointer> StubMap;
   StubMap stubs_;
 #endif  // defined (ENABLE_GPU)
 
   bool log_messages_;  // True if we should log sent and received messages.
   gpu::gles2::DisallowedFeatures disallowed_features_;
   GpuWatchdog* watchdog_;
   bool software_;
   bool handle_messages_scheduled_;
   bool processed_get_state_fast_;
+  IPC::Message* currently_processing_message_;
 
 #if defined(OS_ANDROID)
   scoped_ptr<StreamTextureManagerAndroid> stream_texture_manager_;
 #endif
 
   base::WeakPtrFactory<GpuChannel> weak_factory_;
 
   DISALLOW_COPY_AND_ASSIGN(GpuChannel);
 };
 
 }  // namespace content
 
 #endif  // CONTENT_COMMON_GPU_GPU_CHANNEL_H_