ARM64: Enable shorten-64-to-32 warning

src/arm64/simulator-arm64.h

Index: src/arm64/simulator-arm64.h
diff --git a/src/arm64/simulator-arm64.h b/src/arm64/simulator-arm64.h
index 108f6f2b5473c5ac99995d34e4d141457ba186cd..902f843f302e2a2caf43d26b47151ae16d5e4407 100644
--- a/src/arm64/simulator-arm64.h
+++ b/src/arm64/simulator-arm64.h
@@ -72,12 +72,6 @@ class SimulatorStack : public v8::internal::AllStatic {
 
 #else  // !defined(USE_SIMULATOR)
 
-enum ReverseByteMode {
-  Reverse16 = 0,
-  Reverse32 = 1,
-  Reverse64 = 2
-};
-
 
 // The proper way to initialize a simulated system register (such as NZCV) is as
 // follows:
@@ -706,9 +700,6 @@ class Simulator : public DecoderVisitor {
   template <typename T>
   void BitfieldHelper(Instruction* instr);
 
-  uint64_t ReverseBits(uint64_t value, unsigned num_bits);
-  uint64_t ReverseBytes(uint64_t value, ReverseByteMode mode);
-
   template <typename T>
   T FPDefaultNaN() const;
 
@@ -884,10 +875,10 @@ class Simulator : public DecoderVisitor {
       FUNCTION_ADDR(entry),                                                    \
       p0, p1, p2, p3, p4))
 
-#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8)  \
-  Simulator::current(Isolate::Current())->CallRegExp(                          \
-      entry,                                                                   \
-      p0, p1, p2, p3, p4, p5, p6, p7, NULL, p8)
+#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
+  static_cast<int>(                                                           \
+      Simulator::current(Isolate::Current())                                  \
+          ->CallRegExp(entry, p0, p1, p2, p3, p4, p5, p6, p7, NULL, p8))
 
 
 // The simulator has its own stack. Thus it has a different stack limit from