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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_INSTRUCTIONS_ARM64_H_ | 5 #ifndef V8_ARM64_INSTRUCTIONS_ARM64_H_ |
6 #define V8_ARM64_INSTRUCTIONS_ARM64_H_ | 6 #define V8_ARM64_INSTRUCTIONS_ARM64_H_ |
7 | 7 |
8 #include "src/arm64/constants-arm64.h" | 8 #include "src/arm64/constants-arm64.h" |
9 #include "src/arm64/utils-arm64.h" | 9 #include "src/arm64/utils-arm64.h" |
10 #include "src/globals.h" | 10 #include "src/globals.h" |
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130 } | 130 } |
131 | 131 |
132 V8_INLINE const Instruction* preceding(int count = 1) const { | 132 V8_INLINE const Instruction* preceding(int count = 1) const { |
133 return following(-count); | 133 return following(-count); |
134 } | 134 } |
135 | 135 |
136 V8_INLINE Instruction* preceding(int count = 1) { | 136 V8_INLINE Instruction* preceding(int count = 1) { |
137 return following(-count); | 137 return following(-count); |
138 } | 138 } |
139 | 139 |
140 #define DEFINE_GETTER(Name, HighBit, LowBit, Func) \ | 140 #define DEFINE_GETTER(Name, HighBit, LowBit, Func) \ |
141 int64_t Name() const { return Func(HighBit, LowBit); } | 141 int32_t Name() const { return Func(HighBit, LowBit); } |
142 INSTRUCTION_FIELDS_LIST(DEFINE_GETTER) | 142 INSTRUCTION_FIELDS_LIST(DEFINE_GETTER) |
143 #undef DEFINE_GETTER | 143 #undef DEFINE_GETTER |
144 | 144 |
145 // ImmPCRel is a compound field (not present in INSTRUCTION_FIELDS_LIST), | 145 // ImmPCRel is a compound field (not present in INSTRUCTION_FIELDS_LIST), |
146 // formed from ImmPCRelLo and ImmPCRelHi. | 146 // formed from ImmPCRelLo and ImmPCRelHi. |
147 int ImmPCRel() const { | 147 int ImmPCRel() const { |
148 DCHECK(IsPCRelAddressing()); | 148 DCHECK(IsPCRelAddressing()); |
149 int const offset = ((ImmPCRelHi() << ImmPCRelLo_width) | ImmPCRelLo()); | 149 int offset = ((ImmPCRelHi() << ImmPCRelLo_width) | ImmPCRelLo()); |
150 int const width = ImmPCRelLo_width + ImmPCRelHi_width; | 150 int width = ImmPCRelLo_width + ImmPCRelHi_width; |
151 return signed_bitextract_32(width - 1, 0, offset); | 151 return signed_bitextract_32(width - 1, 0, offset); |
152 } | 152 } |
153 | 153 |
154 uint64_t ImmLogical(); | 154 uint64_t ImmLogical(); |
155 float ImmFP32(); | 155 float ImmFP32(); |
156 double ImmFP64(); | 156 double ImmFP64(); |
157 | 157 |
158 LSDataSize SizeLSPair() const { | 158 LSDataSize SizeLSPair() const { |
159 return CalcLSPairDataSize( | 159 return CalcLSPairDataSize( |
160 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask))); | 160 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask))); |
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362 | 362 |
363 // Find the PC offset encoded in this instruction. 'this' may be a branch or | 363 // Find the PC offset encoded in this instruction. 'this' may be a branch or |
364 // a PC-relative addressing instruction. | 364 // a PC-relative addressing instruction. |
365 // The offset returned is unscaled. | 365 // The offset returned is unscaled. |
366 int64_t ImmPCOffset(); | 366 int64_t ImmPCOffset(); |
367 | 367 |
368 // Find the target of this instruction. 'this' may be a branch or a | 368 // Find the target of this instruction. 'this' may be a branch or a |
369 // PC-relative addressing instruction. | 369 // PC-relative addressing instruction. |
370 Instruction* ImmPCOffsetTarget(); | 370 Instruction* ImmPCOffsetTarget(); |
371 | 371 |
372 static bool IsValidImmPCOffset(ImmBranchType branch_type, int32_t offset); | 372 static bool IsValidImmPCOffset(ImmBranchType branch_type, ptrdiff_t offset); |
373 bool IsTargetInImmPCOffsetRange(Instruction* target); | 373 bool IsTargetInImmPCOffsetRange(Instruction* target); |
374 // Patch a PC-relative offset to refer to 'target'. 'this' may be a branch or | 374 // Patch a PC-relative offset to refer to 'target'. 'this' may be a branch or |
375 // a PC-relative addressing instruction. | 375 // a PC-relative addressing instruction. |
376 void SetImmPCOffsetTarget(Instruction* target); | 376 void SetImmPCOffsetTarget(Instruction* target); |
377 void SetUnresolvedInternalReferenceImmTarget(Instruction* target); | 377 void SetUnresolvedInternalReferenceImmTarget(Instruction* target); |
378 // Patch a literal load instruction to load from 'source'. | 378 // Patch a literal load instruction to load from 'source'. |
379 void SetImmLLiteral(Instruction* source); | 379 void SetImmLLiteral(Instruction* source); |
380 | 380 |
381 uintptr_t LiteralAddress() { | 381 uintptr_t LiteralAddress() { |
382 int offset = ImmLLiteral() << kLoadLiteralScaleLog2; | 382 int offset = ImmLLiteral() << kLoadLiteralScaleLog2; |
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402 template<typename T> V8_INLINE static Instruction* Cast(T src) { | 402 template<typename T> V8_INLINE static Instruction* Cast(T src) { |
403 return reinterpret_cast<Instruction*>(src); | 403 return reinterpret_cast<Instruction*>(src); |
404 } | 404 } |
405 | 405 |
406 V8_INLINE ptrdiff_t DistanceTo(Instruction* target) { | 406 V8_INLINE ptrdiff_t DistanceTo(Instruction* target) { |
407 return reinterpret_cast<Address>(target) - reinterpret_cast<Address>(this); | 407 return reinterpret_cast<Address>(target) - reinterpret_cast<Address>(this); |
408 } | 408 } |
409 | 409 |
410 | 410 |
411 static const int ImmPCRelRangeBitwidth = 21; | 411 static const int ImmPCRelRangeBitwidth = 21; |
412 static bool IsValidPCRelOffset(int offset) { | 412 static bool IsValidPCRelOffset(ptrdiff_t offset) { return is_int21(offset); } |
413 return is_int21(offset); | |
414 } | |
415 void SetPCRelImmTarget(Instruction* target); | 413 void SetPCRelImmTarget(Instruction* target); |
416 void SetBranchImmTarget(Instruction* target); | 414 void SetBranchImmTarget(Instruction* target); |
417 }; | 415 }; |
418 | 416 |
419 | 417 |
420 // Where Instruction looks at instructions generated by the Assembler, | 418 // Where Instruction looks at instructions generated by the Assembler, |
421 // InstructionSequence looks at instructions sequences generated by the | 419 // InstructionSequence looks at instructions sequences generated by the |
422 // MacroAssembler. | 420 // MacroAssembler. |
423 class InstructionSequence : public Instruction { | 421 class InstructionSequence : public Instruction { |
424 public: | 422 public: |
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531 TRACE_ENABLE = 1 << 6, | 529 TRACE_ENABLE = 1 << 6, |
532 TRACE_DISABLE = 2 << 6, | 530 TRACE_DISABLE = 2 << 6, |
533 TRACE_OVERRIDE = 3 << 6 | 531 TRACE_OVERRIDE = 3 << 6 |
534 }; | 532 }; |
535 | 533 |
536 | 534 |
537 } } // namespace v8::internal | 535 } } // namespace v8::internal |
538 | 536 |
539 | 537 |
540 #endif // V8_ARM64_INSTRUCTIONS_ARM64_H_ | 538 #endif // V8_ARM64_INSTRUCTIONS_ARM64_H_ |
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