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Side by Side Diff: src/arm64/disasm-arm64.cc

Issue 1131573006: ARM64: Enable shorten-64-to-32 warning (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 7 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 #include <string.h> 8 #include <string.h>
9 9
10 #include "src/v8.h" 10 #include "src/v8.h"
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1362 } 1362 }
1363 1363
1364 1364
1365 int Disassembler::SubstituteImmediateField(Instruction* instr, 1365 int Disassembler::SubstituteImmediateField(Instruction* instr,
1366 const char* format) { 1366 const char* format) {
1367 DCHECK(format[0] == 'I'); 1367 DCHECK(format[0] == 'I');
1368 1368
1369 switch (format[1]) { 1369 switch (format[1]) {
1370 case 'M': { // IMoveImm or IMoveLSL. 1370 case 'M': { // IMoveImm or IMoveLSL.
1371 if (format[5] == 'I') { 1371 if (format[5] == 'I') {
1372 uint64_t imm = instr->ImmMoveWide() << (16 * instr->ShiftMoveWide()); 1372 uint64_t imm = static_cast<uint64_t>(instr->ImmMoveWide())
1373 << (16 * instr->ShiftMoveWide());
1373 AppendToOutput("#0x%" PRIx64, imm); 1374 AppendToOutput("#0x%" PRIx64, imm);
1374 } else { 1375 } else {
1375 DCHECK(format[5] == 'L'); 1376 DCHECK(format[5] == 'L');
1376 AppendToOutput("#0x%" PRIx64, instr->ImmMoveWide()); 1377 AppendToOutput("#0x%" PRIx32, instr->ImmMoveWide());
1377 if (instr->ShiftMoveWide() > 0) { 1378 if (instr->ShiftMoveWide() > 0) {
1378 AppendToOutput(", lsl #%d", 16 * instr->ShiftMoveWide()); 1379 AppendToOutput(", lsl #%d", 16 * instr->ShiftMoveWide());
1379 } 1380 }
1380 } 1381 }
1381 return 8; 1382 return 8;
1382 } 1383 }
1383 case 'L': { 1384 case 'L': {
1384 switch (format[2]) { 1385 switch (format[2]) {
1385 case 'L': { // ILLiteral - Immediate Load Literal. 1386 case 'L': { // ILLiteral - Immediate Load Literal.
1386 AppendToOutput("pc%+" PRId64, 1387 AppendToOutput("pc%+" PRId32, instr->ImmLLiteral()
1387 instr->ImmLLiteral() << kLoadLiteralScaleLog2); 1388 << kLoadLiteralScaleLog2);
1388 return 9; 1389 return 9;
1389 } 1390 }
1390 case 'S': { // ILS - Immediate Load/Store. 1391 case 'S': { // ILS - Immediate Load/Store.
1391 if (instr->ImmLS() != 0) { 1392 if (instr->ImmLS() != 0) {
1392 AppendToOutput(", #%" PRId64, instr->ImmLS()); 1393 AppendToOutput(", #%" PRId32, instr->ImmLS());
1393 } 1394 }
1394 return 3; 1395 return 3;
1395 } 1396 }
1396 case 'P': { // ILPx - Immediate Load/Store Pair, x = access size. 1397 case 'P': { // ILPx - Immediate Load/Store Pair, x = access size.
1397 if (instr->ImmLSPair() != 0) { 1398 if (instr->ImmLSPair() != 0) {
1398 // format[3] is the scale value. Convert to a number. 1399 // format[3] is the scale value. Convert to a number.
1399 int scale = format[3] - 0x30; 1400 int scale = format[3] - 0x30;
1400 AppendToOutput(", #%" PRId64, instr->ImmLSPair() * scale); 1401 AppendToOutput(", #%" PRId32, instr->ImmLSPair() * scale);
1401 } 1402 }
1402 return 4; 1403 return 4;
1403 } 1404 }
1404 case 'U': { // ILU - Immediate Load/Store Unsigned. 1405 case 'U': { // ILU - Immediate Load/Store Unsigned.
1405 if (instr->ImmLSUnsigned() != 0) { 1406 if (instr->ImmLSUnsigned() != 0) {
1406 AppendToOutput(", #%" PRIu64, 1407 AppendToOutput(", #%" PRId32, instr->ImmLSUnsigned()
1407 instr->ImmLSUnsigned() << instr->SizeLS()); 1408 << instr->SizeLS());
1408 } 1409 }
1409 return 3; 1410 return 3;
1410 } 1411 }
1411 } 1412 }
1412 } 1413 }
1413 case 'C': { // ICondB - Immediate Conditional Branch. 1414 case 'C': { // ICondB - Immediate Conditional Branch.
1414 int64_t offset = instr->ImmCondBranch() << 2; 1415 int64_t offset = instr->ImmCondBranch() << 2;
1415 char sign = (offset >= 0) ? '+' : '-'; 1416 char sign = (offset >= 0) ? '+' : '-';
1416 AppendToOutput("#%c0x%" PRIx64, sign, offset); 1417 AppendToOutput("#%c0x%" PRIx64, sign, offset);
1417 return 6; 1418 return 6;
1418 } 1419 }
1419 case 'A': { // IAddSub. 1420 case 'A': { // IAddSub.
1420 DCHECK(instr->ShiftAddSub() <= 1); 1421 DCHECK(instr->ShiftAddSub() <= 1);
1421 int64_t imm = instr->ImmAddSub() << (12 * instr->ShiftAddSub()); 1422 int64_t imm = instr->ImmAddSub() << (12 * instr->ShiftAddSub());
1422 AppendToOutput("#0x%" PRIx64 " (%" PRId64 ")", imm, imm); 1423 AppendToOutput("#0x%" PRIx64 " (%" PRId64 ")", imm, imm);
1423 return 7; 1424 return 7;
1424 } 1425 }
1425 case 'F': { // IFPSingle, IFPDouble or IFPFBits. 1426 case 'F': { // IFPSingle, IFPDouble or IFPFBits.
1426 if (format[3] == 'F') { // IFPFBits. 1427 if (format[3] == 'F') { // IFPFBits.
1427 AppendToOutput("#%d", 64 - instr->FPScale()); 1428 AppendToOutput("#%d", 64 - instr->FPScale());
1428 return 8; 1429 return 8;
1429 } else { 1430 } else {
1430 AppendToOutput("#0x%" PRIx64 " (%.4f)", instr->ImmFP(), 1431 AppendToOutput("#0x%" PRIx32 " (%.4f)", instr->ImmFP(),
1431 format[3] == 'S' ? instr->ImmFP32() : instr->ImmFP64()); 1432 format[3] == 'S' ? instr->ImmFP32() : instr->ImmFP64());
1432 return 9; 1433 return 9;
1433 } 1434 }
1434 } 1435 }
1435 case 'T': { // ITri - Immediate Triangular Encoded. 1436 case 'T': { // ITri - Immediate Triangular Encoded.
1436 AppendToOutput("#0x%" PRIx64, instr->ImmLogical()); 1437 AppendToOutput("#0x%" PRIx64, instr->ImmLogical());
1437 return 4; 1438 return 4;
1438 } 1439 }
1439 case 'N': { // INzcv. 1440 case 'N': { // INzcv.
1440 int nzcv = (instr->Nzcv() << Flags_offset); 1441 int nzcv = (instr->Nzcv() << Flags_offset);
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1531 DCHECK(format[0] == 'H'); 1532 DCHECK(format[0] == 'H');
1532 DCHECK(instr->ShiftDP() <= 0x3); 1533 DCHECK(instr->ShiftDP() <= 0x3);
1533 1534
1534 switch (format[1]) { 1535 switch (format[1]) {
1535 case 'D': { // HDP. 1536 case 'D': { // HDP.
1536 DCHECK(instr->ShiftDP() != ROR); 1537 DCHECK(instr->ShiftDP() != ROR);
1537 } // Fall through. 1538 } // Fall through.
1538 case 'L': { // HLo. 1539 case 'L': { // HLo.
1539 if (instr->ImmDPShift() != 0) { 1540 if (instr->ImmDPShift() != 0) {
1540 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; 1541 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"};
1541 AppendToOutput(", %s #%" PRId64, shift_type[instr->ShiftDP()], 1542 AppendToOutput(", %s #%" PRId32, shift_type[instr->ShiftDP()],
1542 instr->ImmDPShift()); 1543 instr->ImmDPShift());
1543 } 1544 }
1544 return 3; 1545 return 3;
1545 } 1546 }
1546 default: 1547 default:
1547 UNREACHABLE(); 1548 UNREACHABLE();
1548 return 0; 1549 return 0;
1549 } 1550 }
1550 } 1551 }
1551 1552
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1825 decoder.AppendVisitor(&disasm); 1826 decoder.AppendVisitor(&disasm);
1826 1827
1827 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { 1828 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
1828 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); 1829 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
1829 } 1830 }
1830 } 1831 }
1831 1832
1832 } // namespace disasm 1833 } // namespace disasm
1833 1834
1834 #endif // V8_TARGET_ARCH_ARM64 1835 #endif // V8_TARGET_ARCH_ARM64
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