ARM64: Enable shorten-64-to-32 warning

src/arm64/assembler-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_
 #define V8_ARM64_ASSEMBLER_ARM64_H_
 
 #include <deque>
 #include <list>
 #include <map>
@@ skipping 746 matching lines @@
 
 
 class ConstPool {
  public:
   explicit ConstPool(Assembler* assm)
       : assm_(assm),
         first_use_(-1),
         shared_entries_count(0) {}
   void RecordEntry(intptr_t data, RelocInfo::Mode mode);
   int EntryCount() const {
-    return shared_entries_count + unique_entries_.size();
+    return shared_entries_count + static_cast<int>(unique_entries_.size());
   }
   bool IsEmpty() const {
     return shared_entries_.empty() && unique_entries_.empty();
   }
   // Distance in bytes between the current pc and the first instruction
   // using the pool. If there are no pending entries return kMaxInt.
   int DistanceToFirstUse();
   // Offset after which instructions using the pool will be out of range.
   int MaxPcOffset();
   // Maximum size the constant pool can be with current entries. It always
@@ skipping 166 matching lines @@
   // quantities, since V8 uses both.
   // TODO(jbramley): Work out what sign to use for these things and if possible,
   // change things to be consistent.
   void AssertSizeOfCodeGeneratedSince(const Label* label, ptrdiff_t size) {
     DCHECK(size >= 0);
     DCHECK(static_cast<uint64_t>(size) == SizeOfCodeGeneratedSince(label));
   }
 
   // Return the number of instructions generated from label to the
   // current position.
-  int InstructionsGeneratedSince(const Label* label) {
+  uint64_t InstructionsGeneratedSince(const Label* label) {
     return SizeOfCodeGeneratedSince(label) / kInstructionSize;
   }
 
   // Number of instructions generated for the return sequence in
   // FullCodeGenerator::EmitReturnSequence.
   static const int kJSReturnSequenceInstructions = 7;
   static const int kJSReturnSequenceLength =
       kJSReturnSequenceInstructions * kInstructionSize;
   // Distance between start of patched return sequence and the emitted address
   // to jump to.
@@ skipping 802 matching lines @@
   // Required by V8.
   void dd(uint32_t data) { dc32(data); }
   void db(uint8_t data) { dc8(data); }
 
   // Code generation helpers --------------------------------------------------
 
   bool IsConstPoolEmpty() const { return constpool_.IsEmpty(); }
 
   Instruction* pc() const { return Instruction::Cast(pc_); }
 
-  Instruction* InstructionAt(int offset) const {
+  Instruction* InstructionAt(ptrdiff_t offset) const {
     return reinterpret_cast<Instruction*>(buffer_ + offset);
   }
 
   ptrdiff_t InstructionOffset(Instruction* instr) const {
     return reinterpret_cast<byte*>(instr) - buffer_;
   }
 
   // Register encoding.
   static Instr Rd(CPURegister rd) {
     DCHECK(rd.code() != kSPRegInternalCode);
@@ skipping 46 matching lines @@
 
   // Branch encoding.
   inline static Instr ImmUncondBranch(int imm26);
   inline static Instr ImmCondBranch(int imm19);
   inline static Instr ImmCmpBranch(int imm19);
   inline static Instr ImmTestBranch(int imm14);
   inline static Instr ImmTestBranchBit(unsigned bit_pos);
 
   // Data Processing encoding.
   inline static Instr SF(Register rd);
-  inline static Instr ImmAddSub(int64_t imm);
+  inline static Instr ImmAddSub(int imm);
   inline static Instr ImmS(unsigned imms, unsigned reg_size);
   inline static Instr ImmR(unsigned immr, unsigned reg_size);
   inline static Instr ImmSetBits(unsigned imms, unsigned reg_size);
   inline static Instr ImmRotate(unsigned immr, unsigned reg_size);
   inline static Instr ImmLLiteral(int imm19);
   inline static Instr BitN(unsigned bitn, unsigned reg_size);
   inline static Instr ShiftDP(Shift shift);
   inline static Instr ImmDPShift(unsigned amount);
   inline static Instr ExtendMode(Extend extend);
   inline static Instr ImmExtendShift(unsigned left_shift);
@@ skipping 14 matching lines @@
   inline static Instr ImmShiftLS(unsigned shift_amount);
   inline static Instr ImmException(int imm16);
   inline static Instr ImmSystemRegister(int imm15);
   inline static Instr ImmHint(int imm7);
   inline static Instr ImmBarrierDomain(int imm2);
   inline static Instr ImmBarrierType(int imm2);
   inline static LSDataSize CalcLSDataSize(LoadStoreOp op);
 
   static bool IsImmLSUnscaled(int64_t offset);
   static bool IsImmLSScaled(int64_t offset, LSDataSize size);
+  static bool IsImmLLiteral(int64_t offset);
 
   // Move immediates encoding.
-  inline static Instr ImmMoveWide(uint64_t imm);
-  inline static Instr ShiftMoveWide(int64_t shift);
+  inline static Instr ImmMoveWide(int imm);
+  inline static Instr ShiftMoveWide(int shift);
 
   // FP Immediates.
   static Instr ImmFP32(float imm);
   static Instr ImmFP64(double imm);
   inline static Instr FPScale(unsigned scale);
 
   // FP register type.
   inline static Instr FPType(FPRegister fd);
 
   // Class for scoping postponing the constant pool generation.
@@ skipping 426 matching lines @@
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBufferSpace();
   }
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM64_ASSEMBLER_ARM64_H_