PNaCl: Add more MIPS support to the toolchain

pnacl/driver/pnacl-translate.py

 #!/usr/bin/python
 # Copyright (c) 2012 The Native Client Authors. All rights reserved.
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 #
 # IMPORTANT NOTE: If you make local mods to this file, you must run:
 #   %  pnacl/build.sh driver
 # in order for them to take effect in the scons build.  This command
 # updates the copy in the toolchain/ tree.
 #
@@ skipping 82 matching lines @@
     '${LIBMODE_NEWLIB ? -l:libcrt_platform.a} ',
 
   # Determine whether or not to use bitcode metadata to generate .so stubs
   # for the final link.
   'USE_META': '0',
 
   'TRIPLE'      : '${TRIPLE_%ARCH%}',
   'TRIPLE_ARM'  : 'armv7a-none-nacl-gnueabi',
   'TRIPLE_X8632': 'i686-none-nacl-gnu',
   'TRIPLE_X8664': 'x86_64-none-nacl-gnu',
+  'TRIPLE_MIPS32': 'mipsel-none-nacl-gnu',
 
   'LLC_FLAGS_COMMON': '${PIC ? -relocation-model=pic} ' +
                       #  -force-tls-non-pic makes the code generator (llc)
                       # do the work that would otherwise be done by
                       # linker rewrites which are quite messy in the nacl
                       # case and hence have not been implemented in gold
                       '${PIC && !SHARED ? -force-tls-non-pic} ' +
                       # this translates the pexe one function at a time
                       # which is also what the streaming translation does
                       '-reduce-memory-footprint',
 
 
   'LLC_FLAGS_ARM'    :
     ('-arm-reserve-r9 -sfi-disable-cp ' +
      '-sfi-load -sfi-store -sfi-stack -sfi-branch -sfi-data ' +
      '-no-inline-jumptables -float-abi=hard'),
 
   'LLC_FLAGS_X8632' : '',
   'LLC_FLAGS_X8664' : '',
 
+  'LLC_FLAGS_MIPS32': '-sfi-load -sfi-store -sfi-stack -sfi-branch -sfi-data',
+
   # LLC flags which set the target and output type.
   # These are handled separately by libLTO.
   'LLC_FLAGS_TARGET' : '-mcpu=${LLC_MCPU} ' +
                        '-mtriple=${TRIPLE} ' +
                        '-filetype=${filetype}',
   # Additional non-default flags go here.
   'LLC_FLAGS_EXTRA' : '',
 
   # slower translation == faster code
   'LLC_FLAGS_SLOW':
@@ skipping 22 matching lines @@
   'LLC_FLAGS_FAST_X8664':
                            '-O1 ' +
   # broken
   #                        '-fast-isel ' +
                           '-tail-merge-threshold=20',
   'LLC_FLAGS_FAST_ARM':
   # due to slow turn around times ARM settings have not been explored in depth
   #                       '-O2 ' +
                           '-fast-isel ' +
                           '-tail-merge-threshold=20',
+  'LLC_FLAGS_FAST_MIPS32': '-fast-isel -tail-merge-threshold=20',
 
   'LLC_FLAGS': '${LLC_FLAGS_TARGET} ' +
                '${LLC_FLAGS_COMMON} ' +
                '${LLC_FLAGS_%ARCH%} ' +
                '${LLC_FLAGS_EXTRA} ' +
                '${FAST_TRANSLATION ? ${LLC_FLAGS_FAST} : ${LLC_FLAGS_SLOW}}',
 
   # CPU that is representative of baseline feature requirements for NaCl
   # and/or chrome.  We may want to make this more like "-mtune"
   # by specifying both "-mcpu=X" and "-mattr=+feat1,-feat2,...".
   # Note: this may be different from the in-browser translator, which may
   # do auto feature detection based on CPUID, but constrained by what is
   # accepted by NaCl validators.
   'LLC_MCPU'        : '${LLC_MCPU_%ARCH%}',
   'LLC_MCPU_ARM'    : 'cortex-a8',
   'LLC_MCPU_X8632'  : 'pentium4',
   'LLC_MCPU_X8664'  : 'core2',
+  'LLC_MCPU_MIPS32' : 'mips32r2',
 
   # Note: this is only used in the unsandboxed case
   'RUN_LLC'       : '${LLVM_LLC} ${LLC_FLAGS} ${input} -o ${output} ' +
                     '-metadata-text ${output}.meta',
   # Rate in bits/sec to stream the bitcode from sel_universal over SRPC
   # for testing. Defaults to 1Gbps (effectively unlimited).
   # If 0, use the non-streaming file-descriptor codepath.
   'BITCODE_STREAM_RATE' : '1000000000',
 }
 
@@ skipping 407 matching lines @@
      Portable executable (.pexe)   -> NaCl ELF executable (.nexe)
 
 ADVANCED OPTIONS:
   -mattr=<+feat1,-feat2>  Toggle specific cpu features on and off.
   -mcpu=<cpu-name>        Target a specific cpu type.  Tunes code as well as
                           turns cpu features on and off.
   -S                      Generate native assembly only.
   -c                      Generate native object file only.
   --pnacl-sb              Use the translator which runs inside the NaCl sandbox.
 """