| Index: src/mips/debug-mips.cc
|
| diff --git a/src/mips/debug-mips.cc b/src/mips/debug-mips.cc
|
| index a14fac8d064ae5452dfe278ce0430b74b6076393..47eba1664d65d8cf4a72ec27bd1c82319adfe4e5 100644
|
| --- a/src/mips/debug-mips.cc
|
| +++ b/src/mips/debug-mips.cc
|
| @@ -153,10 +153,8 @@ void DebugCodegen::GenerateCallICStubDebugBreak(MacroAssembler* masm) {
|
| void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) {
|
| Register receiver = LoadDescriptor::ReceiverRegister();
|
| Register name = LoadDescriptor::NameRegister();
|
| - RegList regs = receiver.bit() | name.bit();
|
| - if (FLAG_vector_ics) {
|
| - regs |= VectorLoadICTrampolineDescriptor::SlotRegister().bit();
|
| - }
|
| + RegList regs = receiver.bit() | name.bit() |
|
| + VectorLoadICTrampolineDescriptor::SlotRegister().bit();
|
| Generate_DebugBreakCallHelper(masm, regs, 0);
|
| }
|
|
|
|
|