Replace the constant pool access ldr instructions with movw/movt, and remove ...

src/arm/simulator-arm.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 415 matching lines @@
   // shell when hit.
   RedoBreakpoints();
 
 #undef COMMAND_SIZE
 #undef ARG_SIZE
 
 #undef STR
 #undef XSTR
 }
 
+static const int kICachePageSize = 0x1000;
+static const int kICachePageMask = 0xfff;
+static const int kICachePageShift = 12;
+static const int kICacheLineLength = 4;
+static const int kICacheLineMask = 3;
+static const int kPageSpace = kICachePageSize
++ kICachePageSize / kICacheLineLength;
+
+
+static bool ICacheMatch(void* one, void* two) {
+  ASSERT((reinterpret_cast<intptr_t>(one) & kICachePageMask) == 0);
+  return one == two;
+}
+
+
+static uint32_t ICacheHash(void* key) {
+  return static_cast<uint32_t>(reinterpret_cast<uintptr_t>(key)) >> 2;
+}
+
+
+static char* CacheValid(char* cache_page, int offset) {
+  return &cache_page[kICachePageSize + offset / kICacheLineLength];
+}
+
+
+static bool AllOnOnePage(uintptr_t start, int size) {
+  intptr_t start_page = (start & ~kICachePageMask);
+  intptr_t end_page = ((start + size) & ~kICachePageMask);
+  return start_page == end_page;
+}
+
+
+void Simulator::FlushICache(void* start_addr, size_t size) {
+  intptr_t start = reinterpret_cast<intptr_t>(start_addr);
+  int intra_line = (start & kICacheLineMask);
+  start -= intra_line;
+  size += intra_line;
+  size = ((size - 1) | kICacheLineMask) + 1;
+  int offset = (start & kICachePageMask);
+  while (!AllOnOnePage(start, size - 1)) {
+    int bytes_to_flush = kICachePageSize - offset;
+    FlushOnePage(start, bytes_to_flush);
+    start += bytes_to_flush;
+    size -= bytes_to_flush;
+    ASSERT_EQ(0, start & kICachePageMask);
+    offset = 0;
+  }
+  if (size != 0) {
+    FlushOnePage(start, size);
+  }
+}
+
+
+char* Simulator::GetCachePage(void* page) {
+  v8::internal::HashMap::Entry* entry = i_cache_.Lookup(page,
+                                                        ICacheHash(page),
+                                                        true);
+  if (entry->value == NULL) {
+    char* new_page = new char[kPageSpace];
+    // Set the ICache to invalid for the new pages.
+    memset(new_page, 1, kPageSpace);
+    entry->value = new_page;
+    // printf("New cache allocated from %p to %p\n",
+    // (void*)(new_page), (void*)(new_page + kPageSpace));
+  }
+  return reinterpret_cast<char*>(entry->value);
+}
+
+
+// Flush from start up to and not including start + size.
+void Simulator::FlushOnePage(intptr_t start, int size) {
+  // printf("Flushing icache from %p to %p\n",
+  // (void*)start, (void*)(start + size));
+  ASSERT(size <= kICachePageSize);
+  ASSERT(AllOnOnePage(start, size - 1));
+  ASSERT((start & kICacheLineMask) == 0);
+  ASSERT((size & kICacheLineMask) == 0);
+  void* page = reinterpret_cast<void*>(start & (~kICachePageMask));
+  int offset = (start & kICachePageMask);
+  char* cache_page = GetCachePage(page);
+  char* valid_bytemap = CacheValid(cache_page, offset);
+  // printf("Zero bytes from %p to %p\n", (void*)valid_bytemap,
+  // (void*)(valid_bytemap + size / kICacheLineLength));
+  memset(valid_bytemap, 0, size / kICacheLineLength);
+}
+
+
+void Simulator::CheckICache(Instr* instr) {
+  intptr_t address = reinterpret_cast<intptr_t>(instr);
+  void* page = reinterpret_cast<void*>(address & (~kICachePageMask));
+  void* line = reinterpret_cast<void*>(address & (~kICacheLineMask));
+  int offset = (address & kICachePageMask);
+  char* cache_page = GetCachePage(page);
+  char* cache_valid_byte = CacheValid(cache_page, offset);
+  bool cache_hit = (*cache_valid_byte != 0);
+  char* cached_insn = cache_page + (offset & ~kICacheLineMask);
+  if (cache_hit) {
+    // Check that the data in memory matches the contents of the I-cache.
+    // printf("Checked cache byte at %p\n", (void*)cache_valid_byte);
+    // printf("Check instructions in cache for %p from %p to %p\n",
+    // (void*)instr, (void*)cached_insn,
+    // (void*)(cached_insn + kICacheLineLength));
+    CHECK(memcmp(reinterpret_cast<void*>(instr),
+                 cache_page + offset,
+                 Instr::kInstrSize) == 0);
+  } {
+    // Cache miss.  Load memory into the cache.
+    // printf("Set instructions in cache for %p from %p to %p\n",
+    // (void*)instr, (void*)cached_insn,
+    // (void*)(cached_insn + kICacheLineLength));
+    memcpy(cached_insn, line, Instr::kInstrSize);
+    // printf("Set cache byte at %p\n", (void*)cache_valid_byte);
+    *cache_valid_byte = 1;
+  }
+}
+
 
 // Create one simulator per thread and keep it in thread local storage.
 static v8::internal::Thread::LocalStorageKey simulator_key;
 
 
 bool Simulator::initialized_ = false;
 
 
 void Simulator::Initialize() {
   if (initialized_) return;
   simulator_key = v8::internal::Thread::CreateThreadLocalKey();
   initialized_ = true;
   ::v8::internal::ExternalReference::set_redirector(&RedirectExternalReference);
 }
 
 
-Simulator::Simulator() {
+Simulator::Simulator() : i_cache_(&ICacheMatch) {
   Initialize();
   // Setup simulator support first. Some of this information is needed to
   // setup the architecture state.
   size_t stack_size = 1 * 1024*1024;  // allocate 1MB for stack
   stack_ = reinterpret_cast<char*>(malloc(stack_size));
   pc_modified_ = false;
   icount_ = 0;
   break_pc_ = NULL;
   break_instr_ = 0;
 
@@ skipping 44 matching lines @@
 // reference to a swi (software-interrupt) instruction that is handled by
 // the simulator.  We write the original destination of the jump just at a known
 // offset from the swi instruction so the simulator knows what to call.
 class Redirection {
  public:
   Redirection(void* external_function, bool fp_return)
       : external_function_(external_function),
         swi_instruction_((AL << 28) | (0xf << 24) | call_rt_redirected),
         fp_return_(fp_return),
         next_(list_) {
+    assembler::arm::Simulator::current()->
+        FlushICache(reinterpret_cast<void*>(&swi_instruction_),
+                    Instr::kInstrSize);
     list_ = this;
   }
 
   void* address_of_swi_instruction() {
     return reinterpret_cast<void*>(&swi_instruction_);
   }
 
   void* external_function() { return external_function_; }
   bool fp_return() { return fp_return_; }
 
@@ skipping 1035 matching lines @@
       }
 
       case TST: {
         if (instr->HasS()) {
           // Format(instr, "tst'cond 'rn, 'shift_rm");
           // Format(instr, "tst'cond 'rn, 'imm");
           alu_out = rn_val & shifter_operand;
           SetNZFlags(alu_out);
           SetCFlag(shifter_carry_out);
         } else {
-          UNIMPLEMENTED();
+          // Format(instr, "movw'cond 'rd, 'imm");
+          alu_out = instr->ImmedMovwMovtField();
+          set_register(rd, alu_out);
         }
         break;
       }
 
       case TEQ: {
         if (instr->HasS()) {
           // Format(instr, "teq'cond 'rn, 'shift_rm");
           // Format(instr, "teq'cond 'rn, 'imm");
           alu_out = rn_val ^ shifter_operand;
           SetNZFlags(alu_out);
@@ skipping 20 matching lines @@
 
       case CMP: {
         if (instr->HasS()) {
           // Format(instr, "cmp'cond 'rn, 'shift_rm");
           // Format(instr, "cmp'cond 'rn, 'imm");
           alu_out = rn_val - shifter_operand;
           SetNZFlags(alu_out);
           SetCFlag(!BorrowFrom(rn_val, shifter_operand));
           SetVFlag(OverflowFrom(alu_out, rn_val, shifter_operand, false));
         } else {
-          UNIMPLEMENTED();
+          // Format(instr, "movt'cond 'rd, 'imm");
+          alu_out = (get_register(rd) & 0xffff) |
+              (instr->ImmedMovwMovtField() << 16);
+          set_register(rd, alu_out);
         }
         break;
       }
 
       case CMN: {
         if (instr->HasS()) {
           // Format(instr, "cmn'cond 'rn, 'shift_rm");
           // Format(instr, "cmn'cond 'rn, 'imm");
           alu_out = rn_val + shifter_operand;
           SetNZFlags(alu_out);
@@ skipping 641 matching lines @@
         break;
     }
   } else {
     UNIMPLEMENTED();  // Not used by V8.
   }
 }
 
 
 // Executes the current instruction.
 void Simulator::InstructionDecode(Instr* instr) {
+  CheckICache(instr);
   pc_modified_ = false;
   if (::v8::internal::FLAG_trace_sim) {
     disasm::NameConverter converter;
     disasm::Disassembler dasm(converter);
     // use a reasonably large buffer
     v8::internal::EmbeddedVector<char, 256> buffer;
     dasm.InstructionDecode(buffer,
                            reinterpret_cast<byte*>(instr));
     PrintF("  0x%08x  %s\n", instr, buffer.start());
   }
@@ skipping 174 matching lines @@
 
 
 uintptr_t Simulator::PopAddress() {
   int current_sp = get_register(sp);
   uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
-
 } }  // namespace assembler::arm
 
 #endif  // !defined(__arm__)