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Side by Side Diff: src/IceInstARM32.def

Issue 1127963004: Subzero ARM: lowerArguments (GPR), basic legalize(), and lowerRet(i32, i64). (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: fix warnings, etc Created 5 years, 7 months ago
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1 //===- subzero/src/IceInstARM32.def - X-Macros for ARM32 insts --*- C++ -*-===// 1 //===- subzero/src/IceInstARM32.def - X-Macros for ARM32 insts --*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines properties of ARM32 instructions in the form of x-macros. 10 // This file defines properties of ARM32 instructions in the form of x-macros.
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
74 X(IceType_f64, IceType_void, "", 10, 10) \ 74 X(IceType_f64, IceType_void, "", 10, 10) \
75 X(IceType_v4i1, IceType_i32 , "", 0, 0) \ 75 X(IceType_v4i1, IceType_i32 , "", 0, 0) \
76 X(IceType_v8i1, IceType_i16 , "", 0, 0) \ 76 X(IceType_v8i1, IceType_i16 , "", 0, 0) \
77 X(IceType_v16i1, IceType_i8 , "", 0, 0) \ 77 X(IceType_v16i1, IceType_i8 , "", 0, 0) \
78 X(IceType_v16i8, IceType_i8 , "", 0, 0) \ 78 X(IceType_v16i8, IceType_i8 , "", 0, 0) \
79 X(IceType_v8i16, IceType_i16 , "", 0, 0) \ 79 X(IceType_v8i16, IceType_i16 , "", 0, 0) \
80 X(IceType_v4i32, IceType_i32 , "", 0, 0) \ 80 X(IceType_v4i32, IceType_i32 , "", 0, 0) \
81 X(IceType_v4f32, IceType_f32 , "", 0, 0) \ 81 X(IceType_v4f32, IceType_f32 , "", 0, 0) \
82 //#define X(tag, elementty, width, sbits, ubits) 82 //#define X(tag, elementty, width, sbits, ubits)
83 83
84 // Shifter types for Data-processing operands as defined in section A5.1.2.
85 #define ICEINSTARM32SHIFT_TABLE \
86 /* enum value, emit */ \
87 X(LSL, "lsl") \
88 X(LSR, "lsr") \
89 X(ASR, "asr") \
90 X(ROR, "ror") \
91 X(RRX, "rrx") \
92 //#define X(tag, emit)
93
84 #endif // SUBZERO_SRC_ICEINSTARM32_DEF 94 #endif // SUBZERO_SRC_ICEINSTARM32_DEF
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