Add flag --support_debugger, controls emitting single stepping checks. Disable in --noopt, 6% gain.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
 #include "vm/dart_entry.h"
 #include "vm/flow_graph_compiler.h"
 #include "vm/heap.h"
 #include "vm/instructions.h"
 #include "vm/object_store.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 #include "vm/tags.h"
 
 #define __ assembler->
 
 namespace dart {
 
 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects.");
 DEFINE_FLAG(bool, use_slow_path, false,
     "Set to true for debugging & verifying the slow paths.");
 DECLARE_FLAG(bool, trace_optimized_ic_calls);
 DECLARE_FLAG(int, optimization_counter_threshold);
+DECLARE_FLAG(bool, support_debugger);
 
 // Input parameters:
 //   RA : return address.
 //   SP : address of last argument in argument array.
 //   SP + 4*S4 - 4 : address of first argument in argument array.
 //   SP + 4*S4 : address of return value.
 //   S5 : address of the runtime function to call.
 //   S4 : number of arguments to the call.
 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) {
   const intptr_t isolate_offset = NativeArguments::isolate_offset();
@@ skipping 1408 matching lines @@
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ BranchEqual(T0, Immediate(num_args), &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
 
-  __ Comment("Check single stepping");
   Label stepping, done_stepping;
-  __ LoadIsolate(T0);
-  __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchNotEqual(T0, Immediate(0), &stepping);
-  __ Bind(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ Comment("Check single stepping");
+    __ LoadIsolate(T0);
+    __ lbu(T0, Address(T0, Isolate::single_step_offset()));
+    __ BranchNotEqual(T0, Immediate(0), &stepping);
+    __ Bind(&done_stepping);
+  }
 
   __ Comment("Range feedback collection");
   Label not_smi_or_overflow;
   if (range_collection_mode == kCollectRanges) {
     ASSERT((num_args == 1) || (num_args == 2));
     if (num_args == 2) {
       __ lw(T0, Address(SP, 1 * kWordSize));
       __ UpdateRangeFeedback(T0, 0, S5, T1, &not_smi_or_overflow);
     }
 
@@ skipping 163 matching lines @@
     __ UpdateRangeFeedback(V0, 2, S5, T1, &done);
     __ Bind(&done);
     __ addiu(SP, SP, Immediate(frame_size * kWordSize));
     __ LeaveStubFrame();
     __ Ret();
   } else {
     __ jr(T4);
   }
 
   // Call single step callback in debugger.
-  __ Bind(&stepping);
-  __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-2 * kWordSize));
-  __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
-  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-  __ lw(RA, Address(SP, 0 * kWordSize));
-  __ lw(S5, Address(SP, 1 * kWordSize));
-  __ addiu(SP, SP, Immediate(2 * kWordSize));
-  __ LeaveStubFrame();
-  __ b(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ Bind(&stepping);
+    __ EnterStubFrame();
+    __ addiu(SP, SP, Immediate(-2 * kWordSize));
+    __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
+    __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+    __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+    __ lw(RA, Address(SP, 0 * kWordSize));
+    __ lw(S5, Address(SP, 1 * kWordSize));
+    __ addiu(SP, SP, Immediate(2 * kWordSize));
+    __ LeaveStubFrame();
+    __ b(&done_stepping);
+  }
 }
 
 
 // Use inline cache data array to invoke the target or continue in inline
 // cache miss handler. Stub for 1-argument check (receiver class).
 //  RA: Return address.
 //  S5: Inline cache data object.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
@@ skipping 109 matching lines @@
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ beq(T0, ZR, &ok);
     __ Stop("Incorrect IC data for unoptimized static call");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
   // Check single stepping.
   Label stepping, done_stepping;
-  __ LoadIsolate(T0);
-  __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchNotEqual(T0, Immediate(0), &stepping);
-  __ Bind(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ LoadIsolate(T0);
+    __ lbu(T0, Address(T0, Isolate::single_step_offset()));
+    __ BranchNotEqual(T0, Immediate(0), &stepping);
+    __ Bind(&done_stepping);
+  }
 
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with entries: target functions and count.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
   const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize;
   const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize;
 
   if (FLAG_optimization_counter_threshold >= 0) {
@@ skipping 11 matching lines @@
 
   // Get function and call it, if possible.
   __ lw(T0, Address(T0, target_offset));
   __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
 
   // T4: target instructions.
   __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
   __ jr(T4);
 
   // Call single step callback in debugger.
-  __ Bind(&stepping);
-  __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-2 * kWordSize));
-  __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
-  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-  __ lw(RA, Address(SP, 0 * kWordSize));
-  __ lw(S5, Address(SP, 1 * kWordSize));
-  __ addiu(SP, SP, Immediate(2 * kWordSize));
-  __ LeaveStubFrame();
-  __ b(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ Bind(&stepping);
+    __ EnterStubFrame();
+    __ addiu(SP, SP, Immediate(-2 * kWordSize));
+    __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
+    __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+    __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+    __ lw(RA, Address(SP, 0 * kWordSize));
+    __ lw(S5, Address(SP, 1 * kWordSize));
+    __ addiu(SP, SP, Immediate(2 * kWordSize));
+    __ LeaveStubFrame();
+    __ b(&done_stepping);
+  }
 }
 
 
 void StubCode::GenerateOneArgUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   GenerateNArgsCheckInlineCacheStub(
       assembler, 1, kStaticCallMissHandlerOneArgRuntimeEntry, Token::kILLEGAL,
       kIgnoreRanges);
 }
 
@@ skipping 372 matching lines @@
 
 // Called only from unoptimized code. All relevant registers have been saved.
 // RA: return address.
 // SP + 4: left operand.
 // SP + 0: right operand.
 // Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   // Check single stepping.
   Label stepping, done_stepping;
-  __ LoadIsolate(T0);
-  __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchNotEqual(T0, Immediate(0), &stepping);
-  __ Bind(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ LoadIsolate(T0);
+    __ lbu(T0, Address(T0, Isolate::single_step_offset()));
+    __ BranchNotEqual(T0, Immediate(0), &stepping);
+    __ Bind(&done_stepping);
+  }
 
   const Register temp1 = T2;
   const Register temp2 = T3;
   const Register left = T1;
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 
   // Call single step callback in debugger.
-  __ Bind(&stepping);
-  __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-1 * kWordSize));
-  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-  __ lw(RA, Address(SP, 0 * kWordSize));
-  __ addiu(SP, SP, Immediate(1 * kWordSize));
-  __ LeaveStubFrame();
-  __ b(&done_stepping);
+  if (FLAG_support_debugger) {
+    __ Bind(&stepping);
+    __ EnterStubFrame();
+    __ addiu(SP, SP, Immediate(-1 * kWordSize));
+    __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+    __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+    __ lw(RA, Address(SP, 0 * kWordSize));
+    __ addiu(SP, SP, Immediate(1 * kWordSize));
+    __ LeaveStubFrame();
+    __ b(&done_stepping);
+  }
 }
 
 
 // Called from optimized code only.
 // SP + 4: left operand.
 // SP + 0: right operand.
 // Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateOptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   const Register temp1 = T2;
@@ skipping 57 matching lines @@
 // Result:
 //  T1: entry point.
 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) {
   EmitMegamorphicLookup(assembler, T0, T1, T1);
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS