First draft of the sh4 port

src/sh4/cpu-sh4.cc

Index: src/sh4/cpu-sh4.cc
diff --git a/src/ia32/frames-ia32.cc b/src/sh4/cpu-sh4.cc
similarity index 74%
copy from src/ia32/frames-ia32.cc
copy to src/sh4/cpu-sh4.cc
index dd44f0ee5ff12dc7de0df1a33a544e6c19723934..b0708ec002b3dd52b485f4c4b80dfd1e66de4d9b 100644
--- a/src/ia32/frames-ia32.cc
+++ b/src/sh4/cpu-sh4.cc
@@ -1,4 +1,4 @@
-// Copyright 2006-2008 the V8 project authors. All rights reserved.
+// Copyright 2011-2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
@@ -25,21 +25,40 @@
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
+#include <unistd.h>
+#include <sys/syscall.h>
+#include <asm/cachectl.h>
+
 #include "v8.h"
 
-#if defined(V8_TARGET_ARCH_IA32)
+#if defined(V8_TARGET_ARCH_SH4)
 
-#include "frames-inl.h"
+#include "cpu.h"
+#include "macro-assembler.h"
 
 namespace v8 {
 namespace internal {
 
+void CPU::SetUp() {
+  CpuFeatures::Probe();
+}
+
+
+bool CPU::SupportsCrankshaft() {
+  return false;
+}
+
 
-Address ExitFrame::ComputeStackPointer(Address fp) {
-  return Memory::Address_at(fp + ExitFrameConstants::kSPOffset);
+void CPU::FlushICache(void* start, size_t size) {
+  // Invalidate the instruction and the data cache
+  syscall(__NR_cacheflush, start, size, CACHEFLUSH_D_WB | CACHEFLUSH_I);
 }
 
 
+void CPU::DebugBreak() {
+  asm("ldtlb");
+}
+
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_IA32
+#endif  // V8_TARGET_ARCH_SH4