First draft of the sh4 port

src/sh4/macro-assembler-sh4.cc

-// Copyright 2012 the V8 project authors. All rights reserved.
+// Copyright 2011-2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
 //       with the distribution.
 //     * Neither the name of Google Inc. nor the names of its
 //       contributors may be used to endorse or promote products derived
 //       from this software without specific prior written permission.
 //
 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-#include <limits.h>  // For LONG_MIN, LONG_MAX.
-
 #include "v8.h"
 
-#if defined(V8_TARGET_ARCH_ARM)
+#if defined(V8_TARGET_ARCH_SH4)
 
 #include "bootstrapper.h"
 #include "codegen.h"
 #include "debug.h"
 #include "runtime.h"
 
+#include "map-sh4.h"    // Define register map
+
 namespace v8 {
 namespace internal {
 
+#ifdef DEBUG
+#define RECORD_LINE() RecordFunctionLine(__FUNCTION__, __LINE__)
+#else
+#define RECORD_LINE() ((void)0)
+#endif
+
 MacroAssembler::MacroAssembler(Isolate* arg_isolate, void* buffer, int size)
     : Assembler(arg_isolate, buffer, size),
       generating_stub_(false),
       allow_stub_calls_(true),
       has_frame_(false) {
   if (isolate() != NULL) {
     code_object_ = Handle<Object>(isolate()->heap()->undefined_value(),
                                   isolate());
   }
 }
 
 
-// We always generate arm code, never thumb code, even if V8 is compiled to
-// thumb, so we require inter-working support
-#if defined(__thumb__) && !defined(USE_THUMB_INTERWORK)
-#error "flag -mthumb-interwork missing"
-#endif
-
-
-// We do not support thumb inter-working with an arm architecture not supporting
-// the blx instruction (below v5t).  If you know what CPU you are compiling for
-// you can use -march=armv7 or similar.
-#if defined(USE_THUMB_INTERWORK) && !defined(CAN_USE_THUMB_INSTRUCTIONS)
-# error "For thumb inter-working we require an architecture which supports blx"
-#endif
-
-
-// Using bx does not yield better code, so use it only when required
-#if defined(USE_THUMB_INTERWORK)
-#define USE_BX 1
-#endif
-
-
-void MacroAssembler::Jump(Register target, Condition cond) {
-#if USE_BX
-  bx(target, cond);
-#else
-  mov(pc, Operand(target), LeaveCC, cond);
-#endif
+void MacroAssembler::Jump(Register Rd) {
+  jmp(Rd);
 }
 
 
-void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
-                          Condition cond) {
-#if USE_BX
-  mov(ip, Operand(target, rmode));
-  bx(ip, cond);
-#else
-  mov(pc, Operand(target, rmode), LeaveCC, cond);
-#endif
+void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode) {
+  RECORD_LINE();
+  mov(sh4_ip, Operand(target, rmode));
+  jmp(sh4_ip);
 }
 
 
-void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode,
-                          Condition cond) {
-  ASSERT(!RelocInfo::IsCodeTarget(rmode));
-  Jump(reinterpret_cast<intptr_t>(target), rmode, cond);
-}
-
-
-void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
-                          Condition cond) {
+void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode) {
   ASSERT(RelocInfo::IsCodeTarget(rmode));
-  // 'code' is always generated ARM code, never THUMB code
-  Jump(reinterpret_cast<intptr_t>(code.location()), rmode, cond);
-}
-
-
-int MacroAssembler::CallSize(Register target, Condition cond) {
-#ifdef USE_BLX
-  return kInstrSize;
-#else
-  return 2 * kInstrSize;
-#endif
-}
-
-
-void MacroAssembler::Call(Register target, Condition cond) {
-  // Block constant pool for the call instruction sequence.
-  BlockConstPoolScope block_const_pool(this);
-  Label start;
-  bind(&start);
-#ifdef USE_BLX
-  blx(target, cond);
-#else
-  // set lr for return at current pc + 8
-  mov(lr, Operand(pc), LeaveCC, cond);
-  mov(pc, Operand(target), LeaveCC, cond);
-#endif
-  ASSERT_EQ(CallSize(target, cond), SizeOfCodeGeneratedSince(&start));
-}
-
-
-int MacroAssembler::CallSize(
-    Address target, RelocInfo::Mode rmode, Condition cond) {
-  int size = 2 * kInstrSize;
-  Instr mov_instr = cond | MOV | LeaveCC;
-  intptr_t immediate = reinterpret_cast<intptr_t>(target);
-  if (!Operand(immediate, rmode).is_single_instruction(this, mov_instr)) {
-    size += kInstrSize;
-  }
-  return size;
-}
-
-
-int MacroAssembler::CallSizeNotPredictableCodeSize(
-    Address target, RelocInfo::Mode rmode, Condition cond) {
-  int size = 2 * kInstrSize;
-  Instr mov_instr = cond | MOV | LeaveCC;
-  intptr_t immediate = reinterpret_cast<intptr_t>(target);
-  if (!Operand(immediate, rmode).is_single_instruction(NULL, mov_instr)) {
-    size += kInstrSize;
-  }
-  return size;
-}
-
-
-void MacroAssembler::Call(Address target,
-                          RelocInfo::Mode rmode,
-                          Condition cond,
-                          TargetAddressStorageMode mode) {
-  // Block constant pool for the call instruction sequence.
-  BlockConstPoolScope block_const_pool(this);
-  Label start;
-  bind(&start);
-
-  bool old_predictable_code_size = predictable_code_size();
-  if (mode == NEVER_INLINE_TARGET_ADDRESS) {
-    set_predictable_code_size(true);
-  }
-
-#ifdef USE_BLX
-  // Call sequence on V7 or later may be :
-  //  movw  ip, #... @ call address low 16
-  //  movt  ip, #... @ call address high 16
-  //  blx   ip
-  //                      @ return address
-  // Or for pre-V7 or values that may be back-patched
-  // to avoid ICache flushes:
-  //  ldr   ip, [pc, #...] @ call address
-  //  blx   ip
-  //                      @ return address
-
-  // Statement positions are expected to be recorded when the target
-  // address is loaded. The mov method will automatically record
-  // positions when pc is the target, since this is not the case here
-  // we have to do it explicitly.
-  positions_recorder()->WriteRecordedPositions();
-
-  mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
-  blx(ip, cond);
-
-#else
-  // Set lr for return at current pc + 8.
-  mov(lr, Operand(pc), LeaveCC, cond);
-  // Emit a ldr<cond> pc, [pc + offset of target in constant pool].
-  mov(pc, Operand(reinterpret_cast<int32_t>(target), rmode), LeaveCC, cond);
-#endif
-  ASSERT_EQ(CallSize(target, rmode, cond), SizeOfCodeGeneratedSince(&start));
-  if (mode == NEVER_INLINE_TARGET_ADDRESS) {
-    set_predictable_code_size(old_predictable_code_size);
-  }
-}
-
-
-int MacroAssembler::CallSize(Handle<Code> code,
-                             RelocInfo::Mode rmode,
-                             TypeFeedbackId ast_id,
-                             Condition cond) {
-  return CallSize(reinterpret_cast<Address>(code.location()), rmode, cond);
+  RECORD_LINE();
+  Jump(reinterpret_cast<intptr_t>(code.location()), rmode);
 }
 
 
 void MacroAssembler::Call(Handle<Code> code,
                           RelocInfo::Mode rmode,
-                          TypeFeedbackId ast_id,
-                          Condition cond,
-                          TargetAddressStorageMode mode) {
-  Label start;
-  bind(&start);
+                          TypeFeedbackId ast_id) {
+  // TODO(stm): check whether this is necessary
+  // Label start;
+  // bind(&start);
+
+  RECORD_LINE();
   ASSERT(RelocInfo::IsCodeTarget(rmode));
   if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
     SetRecordedAstId(ast_id);
     rmode = RelocInfo::CODE_TARGET_WITH_ID;
   }
-  // 'code' is always generated ARM code, never THUMB code
-  Call(reinterpret_cast<Address>(code.location()), rmode, cond, mode);
+  jsr(code, rmode, sh4_ip);
+
+  // TODO(stm): check whether this is necessary
+  // ASSERT_EQ(CallSize(code, rmode, ast_id, cond),
+  //           SizeOfCodeGeneratedSince(&start));
 }
 
 
-void MacroAssembler::Ret(Condition cond) {
-#if USE_BX
-  bx(lr, cond);
-#else
-  mov(pc, Operand(lr), LeaveCC, cond);
-#endif
+void MacroAssembler::Ret(int drop) {
+  Drop(drop);
+  Ret();
 }
 
 
-void MacroAssembler::Drop(int count, Condition cond) {
-  if (count > 0) {
-    add(sp, sp, Operand(count * kPointerSize), LeaveCC, cond);
+void MacroAssembler::Move(Register dst, Handle<Object> value) {
+  RECORD_LINE();
+  mov(dst, Operand(value));
+}
+
+
+void MacroAssembler::Move(Register dst, Register src) {
+  if (!dst.is(src)) {
+    RECORD_LINE();
+    mov(dst, src);
   }
 }
 
 
-void MacroAssembler::Ret(int drop, Condition cond) {
-  Drop(drop, cond);
-  Ret(cond);
-}
-
-
-void MacroAssembler::Swap(Register reg1,
-                          Register reg2,
-                          Register scratch,
-                          Condition cond) {
-  if (scratch.is(no_reg)) {
-    eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
-    eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
-    eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
-  } else {
-    mov(scratch, reg1, LeaveCC, cond);
-    mov(reg1, reg2, LeaveCC, cond);
-    mov(reg2, scratch, LeaveCC, cond);
+void MacroAssembler::Ubfx(Register dst, Register src, int lsb, int width) {
+  ASSERT(!dst.is(sh4_rtmp) && !src.is(sh4_rtmp));
+  ASSERT(lsb >= 0 && lsb < 32);
+  ASSERT(width > 0 && width <= 32);
+  ASSERT(width + lsb <= 32);
+  // Extract unsigned value from bits src1[lsb..lsb+width-1] into dst
+  int32_t mask1 = width < 32 ? (1<<width)-1 : -1;
+  int32_t mask = mask1 << lsb;
+  RECORD_LINE();
+  land(dst, src, Operand(mask));
+  if (lsb != 0) {
+    RECORD_LINE();
+    lsr(dst, dst, Operand(lsb));
   }
 }
 
 
-void MacroAssembler::Call(Label* target) {
-  bl(target);
-}
-
-
-void MacroAssembler::Push(Handle<Object> handle) {
-  mov(ip, Operand(handle));
-  push(ip);
-}
-
-
-void MacroAssembler::Move(Register dst, Handle<Object> value) {
-  mov(dst, Operand(value));
-}
-
-
-void MacroAssembler::Move(Register dst, Register src, Condition cond) {
-  if (!dst.is(src)) {
-    mov(dst, src, LeaveCC, cond);
+void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width) {
+  ASSERT(!dst.is(sh4_rtmp) && !src1.is(sh4_rtmp));
+  ASSERT(lsb >= 0 && lsb < 32);
+  ASSERT(width > 0 && width <= 32);
+  ASSERT(width + lsb <= 32);
+  int32_t mask1 = width < 32 ? (1<<width)-1 : -1;
+  int32_t mask = mask1 << lsb;
+  land(dst, src1, Operand(mask));
+  int shift_up = 32 - lsb - width;
+  int shift_down = lsb + shift_up;
+  if (shift_up != 0) {
+    lsl(dst, dst, Operand(shift_up));
+  }
+  if (shift_down != 0) {
+    asr(dst, dst, Operand(shift_down));
   }
 }
 
-
-void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) {
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  CpuFeatures::Scope scope(VFP2);
-  if (!dst.is(src)) {
-    vmov(dst, src);
-  }
-}
-
-
-void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
-                         Condition cond) {
-  if (!src2.is_reg() &&
-      !src2.must_output_reloc_info(this) &&
-      src2.immediate() == 0) {
-    mov(dst, Operand(0, RelocInfo::NONE), LeaveCC, cond);
-  } else if (!src2.is_single_instruction(this) &&
-             !src2.must_output_reloc_info(this) &&
-             CpuFeatures::IsSupported(ARMv7) &&
-             IsPowerOf2(src2.immediate() + 1)) {
-    ubfx(dst, src1, 0,
-        WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
-  } else {
-    and_(dst, src1, src2, LeaveCC, cond);
-  }
-}
-
-
-void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
-                          Condition cond) {
-  ASSERT(lsb < 32);
-  if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
-    int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    and_(dst, src1, Operand(mask), LeaveCC, cond);
-    if (lsb != 0) {
-      mov(dst, Operand(dst, LSR, lsb), LeaveCC, cond);
-    }
-  } else {
-    ubfx(dst, src1, lsb, width, cond);
-  }
-}
-
-
-void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
-                          Condition cond) {
-  ASSERT(lsb < 32);
-  if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
-    int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    and_(dst, src1, Operand(mask), LeaveCC, cond);
-    int shift_up = 32 - lsb - width;
-    int shift_down = lsb + shift_up;
-    if (shift_up != 0) {
-      mov(dst, Operand(dst, LSL, shift_up), LeaveCC, cond);
-    }
-    if (shift_down != 0) {
-      mov(dst, Operand(dst, ASR, shift_down), LeaveCC, cond);
-    }
-  } else {
-    sbfx(dst, src1, lsb, width, cond);
-  }
-}
-
 
 void MacroAssembler::Bfi(Register dst,
                          Register src,
                          Register scratch,
                          int lsb,
-                         int width,
-                         Condition cond) {
+                         int width) {
   ASSERT(0 <= lsb && lsb < 32);
-  ASSERT(0 <= width && width < 32);
-  ASSERT(lsb + width < 32);
-  ASSERT(!scratch.is(dst));
+  ASSERT(0 <= width && width <= 32);
+  ASSERT(lsb + width <= 32);
+  ASSERT(!dst.is(src) && !dst.is(scratch));
   if (width == 0) return;
-  if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
-    int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    bic(dst, dst, Operand(mask));
-    and_(scratch, src, Operand((1 << width) - 1));
-    mov(scratch, Operand(scratch, LSL, lsb));
-    orr(dst, dst, scratch);
-  } else {
-    bfi(dst, src, lsb, width, cond);
+  if (width == 32) {
+    mov(dst, src);
+    return;
   }
+  int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
+  bic(dst, dst, Operand(mask));
+  land(scratch, src, Operand((1 << width) - 1));
+  lsl(scratch, scratch, Operand(lsb));
+  orr(dst, dst, scratch);
 }
 
 
-void MacroAssembler::Bfc(Register dst, Register src, int lsb, int width,
-                         Condition cond) {
-  ASSERT(lsb < 32);
-  if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
-    int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    bic(dst, src, Operand(mask));
-  } else {
-    Move(dst, src, cond);
-    bfc(dst, lsb, width, cond);
-  }
+void MacroAssembler::Bfc(Register dst, int lsb, int width) {
+  ASSERT(!dst.is(sh4_rtmp));
+  ASSERT(lsb >= 0 && lsb < 32);
+  ASSERT(width > 0 && width <= 32);
+  ASSERT(width + lsb <= 32);
+  // Clear bits [lsb..lsb+width-1] of dst
+  int32_t mask1 = width < 32 ? (1<<width)-1 : -1;
+  int32_t mask = mask1 << lsb;
+  RECORD_LINE();
+  land(dst, dst, Operand(~mask));
 }
 
 
-void MacroAssembler::Usat(Register dst, int satpos, const Operand& src,
-                          Condition cond) {
-  if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
-    ASSERT(!dst.is(pc) && !src.rm().is(pc));
-    ASSERT((satpos >= 0) && (satpos <= 31));
+void MacroAssembler::Usat(Register dst, int satpos, Register src) {
+    ASSERT((satpos > 0) && (satpos <= 31));
 
-    // These asserts are required to ensure compatibility with the ARMv7
-    // implementation.
-    ASSERT((src.shift_op() == ASR) || (src.shift_op() == LSL));
-    ASSERT(src.rs().is(no_reg));
-
-    Label done;
     int satval = (1 << satpos) - 1;
 
-    if (cond != al) {
-      b(NegateCondition(cond), &done);  // Skip saturate if !condition.
-    }
-    if (!(src.is_reg() && dst.is(src.rm()))) {
+    if (!src.is(dst)) {
       mov(dst, src);
     }
-    tst(dst, Operand(~satval));
-    b(eq, &done);
-    mov(dst, Operand(0, RelocInfo::NONE), LeaveCC, mi);  // 0 if negative.
-    mov(dst, Operand(satval), LeaveCC, pl);  // satval if positive.
-    bind(&done);
-  } else {
-    usat(dst, satpos, src, cond);
-  }
+    cmpge(dst, Operand(0));
+    mov(dst, Operand(0), f);  // 0 if negative.
+    cmpgt(dst, Operand(satval));
+    mov(dst, Operand(satval), t);  // satval if > satval
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
-                              Heap::RootListIndex index,
-                              Condition cond) {
-  ldr(destination, MemOperand(kRootRegister, index << kPointerSizeLog2), cond);
+                              Heap::RootListIndex index) {
+  RECORD_LINE();
+  ldr(destination, MemOperand(roots, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::StoreRoot(Register source,
-                               Heap::RootListIndex index,
-                               Condition cond) {
-  str(source, MemOperand(kRootRegister, index << kPointerSizeLog2), cond);
+                               Heap::RootListIndex index) {
+  RECORD_LINE();
+  str(source, MemOperand(roots, index << kPointerSizeLog2));
 }
 
 
 void MacroAssembler::LoadHeapObject(Register result,
                                     Handle<HeapObject> object) {
   if (isolate()->heap()->InNewSpace(*object)) {
     Handle<JSGlobalPropertyCell> cell =
         isolate()->factory()->NewJSGlobalPropertyCell(object);
     mov(result, Operand(cell));
     ldr(result, FieldMemOperand(result, JSGlobalPropertyCell::kValueOffset));
   } else {
     mov(result, Operand(object));
   }
 }
 
 
 void MacroAssembler::InNewSpace(Register object,
                                 Register scratch,
                                 Condition cond,
                                 Label* branch) {
+  ASSERT(!object.is(sh4_ip) && !scratch.is(sh4_ip));
+  ASSERT(!object.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
   ASSERT(cond == eq || cond == ne);
-  and_(scratch, object, Operand(ExternalReference::new_space_mask(isolate())));
-  cmp(scratch, Operand(ExternalReference::new_space_start(isolate())));
+  RECORD_LINE();
+  land(scratch, object,
+       Operand(ExternalReference::new_space_mask(isolate())));
+  mov(sh4_ip, Operand(ExternalReference::new_space_start(isolate())));
+  cmpeq(scratch, sh4_ip);
   b(cond, branch);
 }
 
 
 void MacroAssembler::RecordWriteField(
     Register object,
     int offset,
     Register value,
     Register dst,
     LinkRegisterStatus lr_status,
@@ skipping 47 matching lines @@
 void MacroAssembler::RecordWrite(Register object,
                                  Register address,
                                  Register value,
                                  LinkRegisterStatus lr_status,
                                  SaveFPRegsMode fp_mode,
                                  RememberedSetAction remembered_set_action,
                                  SmiCheck smi_check) {
   // The compiled code assumes that record write doesn't change the
   // context register, so we check that none of the clobbered
   // registers are cp.
-  ASSERT(!address.is(cp) && !value.is(cp));
+  ASSERT(!object.is(cp) && !address.is(cp) && !value.is(cp));
+  ASSERT(!object.is(sh4_rtmp) && !address.is(sh4_rtmp) && !value.is(sh4_rtmp));
+  ASSERT(!object.is(sh4_ip) && !address.is(sh4_ip) && !value.is(sh4_ip));
 
   if (emit_debug_code()) {
     ldr(ip, MemOperand(address));
     cmp(ip, value);
     Check(eq, "Wrong address or value passed to RecordWrite");
   }
 
   Label done;
 
   if (smi_check == INLINE_SMI_CHECK) {
     ASSERT_EQ(0, kSmiTag);
     tst(value, Operand(kSmiTagMask));
     b(eq, &done);
   }
 
   CheckPageFlag(value,
                 value,  // Used as scratch.
                 MemoryChunk::kPointersToHereAreInterestingMask,
                 eq,
                 &done);
   CheckPageFlag(object,
                 value,  // Used as scratch.
                 MemoryChunk::kPointersFromHereAreInterestingMask,
                 eq,
                 &done);
 
   // Record the actual write.
   if (lr_status == kLRHasNotBeenSaved) {
-    push(lr);
+    push(pr);
   }
   RecordWriteStub stub(object, value, address, remembered_set_action, fp_mode);
   CallStub(&stub);
   if (lr_status == kLRHasNotBeenSaved) {
-    pop(lr);
+    pop(pr);
   }
 
   bind(&done);
 
   // Clobber clobbered registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
     mov(address, Operand(BitCast<int32_t>(kZapValue + 12)));
     mov(value, Operand(BitCast<int32_t>(kZapValue + 16)));
   }
@@ skipping 23 matching lines @@
   str(scratch, MemOperand(ip));
   // Call stub on end of buffer.
   // Check for end of buffer.
   tst(scratch, Operand(StoreBuffer::kStoreBufferOverflowBit));
   if (and_then == kFallThroughAtEnd) {
     b(eq, &done);
   } else {
     ASSERT(and_then == kReturnAtEnd);
     Ret(eq);
   }
-  push(lr);
+  push(pr);
   StoreBufferOverflowStub store_buffer_overflow =
       StoreBufferOverflowStub(fp_mode);
   CallStub(&store_buffer_overflow);
-  pop(lr);
+  pop(pr);
   bind(&done);
   if (and_then == kReturnAtEnd) {
     Ret();
   }
 }
 
 
-// Push and pop all registers that can hold pointers.
-void MacroAssembler::PushSafepointRegisters() {
-  // Safepoints expect a block of contiguous register values starting with r0:
-  ASSERT(((1 << kNumSafepointSavedRegisters) - 1) == kSafepointSavedRegisters);
-  // Safepoints expect a block of kNumSafepointRegisters values on the
-  // stack, so adjust the stack for unsaved registers.
-  const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
-  ASSERT(num_unsaved >= 0);
-  sub(sp, sp, Operand(num_unsaved * kPointerSize));
-  stm(db_w, sp, kSafepointSavedRegisters);
-}
-
-
-void MacroAssembler::PopSafepointRegisters() {
-  const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
-  ldm(ia_w, sp, kSafepointSavedRegisters);
-  add(sp, sp, Operand(num_unsaved * kPointerSize));
-}
-
-
-void MacroAssembler::PushSafepointRegistersAndDoubles() {
-  PushSafepointRegisters();
-  sub(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters *
-                      kDoubleSize));
-  for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) {
-    vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
-  }
-}
-
-
-void MacroAssembler::PopSafepointRegistersAndDoubles() {
-  for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) {
-    vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize);
-  }
-  add(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters *
-                      kDoubleSize));
-  PopSafepointRegisters();
-}
-
-void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src,
-                                                             Register dst) {
-  str(src, SafepointRegistersAndDoublesSlot(dst));
-}
-
-
-void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
-  str(src, SafepointRegisterSlot(dst));
-}
-
-
 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
   ldr(dst, SafepointRegisterSlot(src));
 }
 
 
 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
-  // The registers are pushed starting with the highest encoding,
-  // which means that lowest encodings are closest to the stack pointer.
-  ASSERT(reg_code >= 0 && reg_code < kNumSafepointRegisters);
-  return reg_code;
+  UNIMPLEMENTED();
+  return 0;
 }
 
 
 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
   return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
 }
 
 
-MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
-  // General purpose registers are pushed last on the stack.
-  int doubles_size = DwVfpRegister::kNumAllocatableRegisters * kDoubleSize;
-  int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;
-  return MemOperand(sp, doubles_size + register_offset);
-}
-
-
 void MacroAssembler::Ldrd(Register dst1, Register dst2,
-                          const MemOperand& src, Condition cond) {
-  ASSERT(src.rm().is(no_reg));
-  ASSERT(!dst1.is(lr));  // r14.
+                          const MemOperand& src) {
+  ASSERT(src.rn().is(no_reg));
   ASSERT_EQ(0, dst1.code() % 2);
   ASSERT_EQ(dst1.code() + 1, dst2.code());
-
-  // V8 does not use this addressing mode, so the fallback code
-  // below doesn't support it yet.
-  ASSERT((src.am() != PreIndex) && (src.am() != NegPreIndex));
+  ASSERT(!dst1.is(sh4_ip) && !dst2.is(sh4_ip));
+  ASSERT(!dst1.is(sh4_rtmp) && !dst2.is(sh4_rtmp));
 
   // Generate two ldr instructions if ldrd is not available.
-  if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size()) {
-    CpuFeatures::Scope scope(ARMv7);
-    ldrd(dst1, dst2, src, cond);
-  } else {
-    if ((src.am() == Offset) || (src.am() == NegOffset)) {
-      MemOperand src2(src);
-      src2.set_offset(src2.offset() + 4);
-      if (dst1.is(src.rn())) {
-        ldr(dst2, src2, cond);
-        ldr(dst1, src, cond);
-      } else {
-        ldr(dst1, src, cond);
-        ldr(dst2, src2, cond);
-      }
-    } else {  // PostIndex or NegPostIndex.
-      ASSERT((src.am() == PostIndex) || (src.am() == NegPostIndex));
-      if (dst1.is(src.rn())) {
-        ldr(dst2, MemOperand(src.rn(), 4, Offset), cond);
-        ldr(dst1, src, cond);
-      } else {
-        MemOperand src2(src);
-        src2.set_offset(src2.offset() - 4);
-        ldr(dst1, MemOperand(src.rn(), 4, PostIndex), cond);
-        ldr(dst2, src2, cond);
-      }
+  // TODO(STM): FPU
+  {
+    MemOperand src2(src);
+    src2.set_offset(src2.offset() + 4);
+    if (dst1.is(src.rm())) {
+      ldr(dst2, src2);
+      ldr(dst1, src);
+    } else {
+      ldr(dst1, src);
+      ldr(dst2, src2);
     }
   }
 }
 
 
 void MacroAssembler::Strd(Register src1, Register src2,
-                          const MemOperand& dst, Condition cond) {
-  ASSERT(dst.rm().is(no_reg));
-  ASSERT(!src1.is(lr));  // r14.
+                          const MemOperand& dst) {
+  ASSERT(dst.rn().is(no_reg));
   ASSERT_EQ(0, src1.code() % 2);
   ASSERT_EQ(src1.code() + 1, src2.code());
-
-  // V8 does not use this addressing mode, so the fallback code
-  // below doesn't support it yet.
-  ASSERT((dst.am() != PreIndex) && (dst.am() != NegPreIndex));
+  ASSERT(!src1.is(sh4_ip) && !src2.is(sh4_ip));
+  ASSERT(!src1.is(sh4_rtmp) && !src2.is(sh4_rtmp));
 
   // Generate two str instructions if strd is not available.
-  if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size()) {
-    CpuFeatures::Scope scope(ARMv7);
-    strd(src1, src2, dst, cond);
-  } else {
+  // TODO(STM): FPU
+  {
     MemOperand dst2(dst);
-    if ((dst.am() == Offset) || (dst.am() == NegOffset)) {
-      dst2.set_offset(dst2.offset() + 4);
-      str(src1, dst, cond);
-      str(src2, dst2, cond);
-    } else {  // PostIndex or NegPostIndex.
-      ASSERT((dst.am() == PostIndex) || (dst.am() == NegPostIndex));
-      dst2.set_offset(dst2.offset() - 4);
-      str(src1, MemOperand(dst.rn(), 4, PostIndex), cond);
-      str(src2, dst2, cond);
-    }
-  }
-}
-
-
-void MacroAssembler::ClearFPSCRBits(const uint32_t bits_to_clear,
-                                    const Register scratch,
-                                    const Condition cond) {
-  vmrs(scratch, cond);
-  bic(scratch, scratch, Operand(bits_to_clear), LeaveCC, cond);
-  vmsr(scratch, cond);
-}
-
-
-void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1,
-                                           const DwVfpRegister src2,
-                                           const Condition cond) {
-  // Compare and move FPSCR flags to the normal condition flags.
-  VFPCompareAndLoadFlags(src1, src2, pc, cond);
-}
-
-void MacroAssembler::VFPCompareAndSetFlags(const DwVfpRegister src1,
-                                           const double src2,
-                                           const Condition cond) {
-  // Compare and move FPSCR flags to the normal condition flags.
-  VFPCompareAndLoadFlags(src1, src2, pc, cond);
-}
-
-
-void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1,
-                                            const DwVfpRegister src2,
-                                            const Register fpscr_flags,
-                                            const Condition cond) {
-  // Compare and load FPSCR.
-  vcmp(src1, src2, cond);
-  vmrs(fpscr_flags, cond);
-}
-
-void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1,
-                                            const double src2,
-                                            const Register fpscr_flags,
-                                            const Condition cond) {
-  // Compare and load FPSCR.
-  vcmp(src1, src2, cond);
-  vmrs(fpscr_flags, cond);
-}
-
-void MacroAssembler::Vmov(const DwVfpRegister dst,
-                          const double imm,
-                          const Register scratch,
-                          const Condition cond) {
-  ASSERT(CpuFeatures::IsEnabled(VFP2));
-  static const DoubleRepresentation minus_zero(-0.0);
-  static const DoubleRepresentation zero(0.0);
-  DoubleRepresentation value(imm);
-  // Handle special values first.
-  if (value.bits == zero.bits) {
-    vmov(dst, kDoubleRegZero, cond);
-  } else if (value.bits == minus_zero.bits) {
-    vneg(dst, kDoubleRegZero, cond);
-  } else {
-    vmov(dst, imm, scratch, cond);
+    dst2.set_offset(dst2.offset() + 4);
+    str(src1, dst);
+    str(src2, dst2);
   }
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type) {
-  // r0-r3: preserved
-  stm(db_w, sp, cp.bit() | fp.bit() | lr.bit());
-  mov(ip, Operand(Smi::FromInt(type)));
-  push(ip);
-  mov(ip, Operand(CodeObject()));
-  push(ip);
+  // r0-r3: must be preserved
+  RECORD_LINE();
+  Push(pr, fp, cp);
+  mov(sh4_ip, Operand(Smi::FromInt(type)));
+  push(sh4_ip);
+  mov(sh4_ip, Operand(CodeObject()));
+  push(sh4_ip);
   add(fp, sp, Operand(3 * kPointerSize));  // Adjust FP to point to saved FP.
 }
 
 
 void MacroAssembler::LeaveFrame(StackFrame::Type type) {
   // r0: preserved
   // r1: preserved
   // r2: preserved
 
   // Drop the execution stack down to the frame pointer and restore
   // the caller frame pointer and return address.
+  RECORD_LINE();
   mov(sp, fp);
-  ldm(ia_w, sp, fp.bit() | lr.bit());
+  Pop(pr, fp);
 }
 
 
-void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
-  // Set up the frame structure on the stack.
+void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space,
+                                    Register scratch) {
+  // Parameters are on stack as if calling JS function
+  // ARM -> ST40 mapping: ip -> scratch (defaults sh4_ip)
+
+  // r0, r1, cp: must be preserved
+  // sp, fp: input/output
+  // Actual clobbers: scratch (r2 by default)
+
+  // Setup the frame structure on the stack
   ASSERT_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);
   ASSERT_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);
   ASSERT_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);
-  Push(lr, fp);
-  mov(fp, Operand(sp));  // Set up new frame pointer.
-  // Reserve room for saved entry sp and code object.
-  sub(sp, sp, Operand(2 * kPointerSize));
+
+  RECORD_LINE();
+  // Save PR and FP
+  Push(pr, fp);
+  // Setup a new frame pointer
+  mov(fp, sp);
+
+  // Reserve room for saved entry sp and code object
+  sub(sp, sp, Operand(2*kPointerSize));
   if (emit_debug_code()) {
-    mov(ip, Operand(0));
-    str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset));
+    mov(scratch, Operand(0));
+    str(scratch, MemOperand(fp, ExitFrameConstants::kSPOffset));
   }
-  mov(ip, Operand(CodeObject()));
-  str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset));
+
+  mov(scratch, Operand(CodeObject()));
+  str(scratch, MemOperand(fp, ExitFrameConstants::kCodeOffset));
 
   // Save the frame pointer and the context in top.
-  mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  str(fp, MemOperand(ip));
-  mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  str(cp, MemOperand(ip));
+  mov(scratch, Operand(ExternalReference(Isolate::kCEntryFPAddress,
+                                         isolate())));
+  str(fp, MemOperand(scratch));
+  mov(scratch, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+  str(cp, MemOperand(scratch));
 
   // Optionally save all double registers.
   if (save_doubles) {
-    DwVfpRegister first = d0;
-    DwVfpRegister last =
-        DwVfpRegister::from_code(DwVfpRegister::kNumRegisters - 1);
-    vstm(db_w, sp, first, last);
-    // Note that d0 will be accessible at
-    //   fp - 2 * kPointerSize - DwVfpRegister::kNumRegisters * kDoubleSize,
-    // since the sp slot and code slot were pushed after the fp.
+    RECORD_LINE();
+    UNIMPLEMENTED_BREAK();
   }
 
   // Reserve place for the return address and stack space and align the frame
   // preparing for calling the runtime function.
-  const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
+  const int frame_alignment = OS::ActivationFrameAlignment();
   sub(sp, sp, Operand((stack_space + 1) * kPointerSize));
   if (frame_alignment > 0) {
     ASSERT(IsPowerOf2(frame_alignment));
-    and_(sp, sp, Operand(-frame_alignment));
+    land(sp, sp, Operand(-frame_alignment));
   }
 
   // Set the exit frame sp value to point just before the return address
   // location.
-  add(ip, sp, Operand(kPointerSize));
-  str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset));
+  add(scratch, sp, Operand(kPointerSize));
+  str(scratch, MemOperand(fp, ExitFrameConstants::kSPOffset));
+}
+
+
+void MacroAssembler::LeaveExitFrame(bool save_doubles,
+                                    Register argument_count) {
+  ASSERT(!argument_count.is(sh4_ip));
+  ASSERT(!argument_count.is(sh4_rtmp));
+  // input: argument_count
+  // r0, r1: results must be preserved
+  // sp: stack pointer
+  // fp: frame pointer
+
+  // Actual clobbers: r3 and ip
+  // r4 should be preserved: see the end of RegExpExecStub::Generate
+
+  RECORD_LINE();
+  if (save_doubles) {
+    RECORD_LINE();
+    UNIMPLEMENTED_BREAK();
+  }
+
+  // Clear top frame.
+  mov(r3, Operand(0, RelocInfo::NONE));
+  mov(sh4_ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+  str(r3, MemOperand(sh4_ip));
+
+  // Restore current context from top and clear it in debug mode.
+  mov(sh4_ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+  ldr(cp, MemOperand(sh4_ip));
+#ifdef DEBUG
+  str(r3, MemOperand(sh4_ip));
+#endif
+
+  // Tear down the exit frame, pop the arguments, and return.
+  mov(sp, fp);
+
+  Pop(pr, fp);
+  if (argument_count.is_valid()) {
+    ASSERT(!argument_count.is(r3));
+    lsl(r3, argument_count, Operand(kPointerSizeLog2));
+    add(sp, sp, r3);
+  }
 }
 
 
 void MacroAssembler::InitializeNewString(Register string,
                                          Register length,
                                          Heap::RootListIndex map_index,
                                          Register scratch1,
                                          Register scratch2) {
-  mov(scratch1, Operand(length, LSL, kSmiTagSize));
+  RECORD_LINE();
+  lsl(scratch1, length, Operand(kSmiTagSize));
   LoadRoot(scratch2, map_index);
   str(scratch1, FieldMemOperand(string, String::kLengthOffset));
   mov(scratch1, Operand(String::kEmptyHashField));
   str(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
   str(scratch1, FieldMemOperand(string, String::kHashFieldOffset));
 }
 
 
-int MacroAssembler::ActivationFrameAlignment() {
-#if defined(V8_HOST_ARCH_ARM)
-  // Running on the real platform. Use the alignment as mandated by the local
-  // environment.
-  // Note: This will break if we ever start generating snapshots on one ARM
-  // platform for another ARM platform with a different alignment.
-  return OS::ActivationFrameAlignment();
-#else  // defined(V8_HOST_ARCH_ARM)
-  // If we are using the simulator then we should always align to the expected
-  // alignment. As the simulator is used to generate snapshots we do not know
-  // if the target platform will need alignment, so this is controlled from a
-  // flag.
-  return FLAG_sim_stack_alignment;
-#endif  // defined(V8_HOST_ARCH_ARM)
-}
-
-
-void MacroAssembler::LeaveExitFrame(bool save_doubles,
-                                    Register argument_count) {
-  // Optionally restore all double registers.
-  if (save_doubles) {
-    // Calculate the stack location of the saved doubles and restore them.
-    const int offset = 2 * kPointerSize;
-    sub(r3, fp, Operand(offset + DwVfpRegister::kNumRegisters * kDoubleSize));
-    DwVfpRegister first = d0;
-    DwVfpRegister last =
-        DwVfpRegister::from_code(DwVfpRegister::kNumRegisters - 1);
-    vldm(ia, r3, first, last);
-  }
-
-  // Clear top frame.
-  mov(r3, Operand(0, RelocInfo::NONE));
-  mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
-  str(r3, MemOperand(ip));
-
-  // Restore current context from top and clear it in debug mode.
-  mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
-  ldr(cp, MemOperand(ip));
-#ifdef DEBUG
-  str(r3, MemOperand(ip));
-#endif
-
-  // Tear down the exit frame, pop the arguments, and return.
-  mov(sp, Operand(fp));
-  ldm(ia_w, sp, fp.bit() | lr.bit());
-  if (argument_count.is_valid()) {
-    add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2));
-  }
-}
-
-void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  if (use_eabi_hardfloat()) {
-    Move(dst, d0);
-  } else {
-    vmov(dst, r0, r1);
-  }
-}
-
-
 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) {
   // This macro takes the dst register to make the code more readable
   // at the call sites. However, the dst register has to be r5 to
   // follow the calling convention which requires the call type to be
   // in r5.
   ASSERT(dst.is(r5));
   if (call_kind == CALL_AS_FUNCTION) {
     mov(dst, Operand(Smi::FromInt(1)));
   } else {
     mov(dst, Operand(Smi::FromInt(0)));
   }
 }
 
 
 void MacroAssembler::InvokePrologue(const ParameterCount& expected,
                                     const ParameterCount& actual,
                                     Handle<Code> code_constant,
                                     Register code_reg,
                                     Label* done,
                                     bool* definitely_mismatches,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper,
                                     CallKind call_kind) {
+  ASSERT(!code_reg.is(sh4_ip));
+  ASSERT(!code_reg.is(sh4_rtmp));
   bool definitely_matches = false;
   *definitely_mismatches = false;
   Label regular_invoke;
 
   // Check whether the expected and actual arguments count match. If not,
   // setup registers according to contract with ArgumentsAdaptorTrampoline:
+  // ARM -> SH4
   //  r0: actual arguments count
   //  r1: function (passed through to callee)
   //  r2: expected arguments count
   //  r3: callee code entry
 
   // The code below is made a lot easier because the calling code already sets
   // up actual and expected registers according to the contract if values are
   // passed in registers.
   ASSERT(actual.is_immediate() || actual.reg().is(r0));
   ASSERT(expected.is_immediate() || expected.reg().is(r2));
   ASSERT((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3));
 
+  RECORD_LINE();
   if (expected.is_immediate()) {
     ASSERT(actual.is_immediate());
     if (expected.immediate() == actual.immediate()) {
       definitely_matches = true;
     } else {
       mov(r0, Operand(actual.immediate()));
       const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel;
       if (expected.immediate() == sentinel) {
         // Don't worry about adapting arguments for builtins that
         // don't want that done. Skip adaption code by making it look
         // like we have a match between expected and actual number of
         // arguments.
         definitely_matches = true;
       } else {
         *definitely_mismatches = true;
         mov(r2, Operand(expected.immediate()));
       }
     }
   } else {
     if (actual.is_immediate()) {
-      cmp(expected.reg(), Operand(actual.immediate()));
-      b(eq, &regular_invoke);
+      cmpeq(expected.reg(), Operand((actual.immediate())));
+      bt(&regular_invoke);
       mov(r0, Operand(actual.immediate()));
     } else {
-      cmp(expected.reg(), Operand(actual.reg()));
-      b(eq, &regular_invoke);
+      cmpeq(expected.reg(), actual.reg());
+      bt(&regular_invoke);
     }
   }
 
+  RECORD_LINE();
   if (!definitely_matches) {
     if (!code_constant.is_null()) {
       mov(r3, Operand(code_constant));
       add(r3, r3, Operand(Code::kHeaderSize - kHeapObjectTag));
     }
 
     Handle<Code> adaptor =
         isolate()->builtins()->ArgumentsAdaptorTrampoline();
     if (flag == CALL_FUNCTION) {
-      call_wrapper.BeforeCall(CallSize(adaptor));
+      call_wrapper.BeforeCall(2 * kInstrSize);
       SetCallKind(r5, call_kind);
       Call(adaptor);
       call_wrapper.AfterCall();
       if (!*definitely_mismatches) {
         b(done);
       }
     } else {
       SetCallKind(r5, call_kind);
       Jump(adaptor, RelocInfo::CODE_TARGET);
     }
     bind(&regular_invoke);
   }
 }
 
 
 void MacroAssembler::InvokeCode(Register code,
                                 const ParameterCount& expected,
                                 const ParameterCount& actual,
                                 InvokeFlag flag,
                                 const CallWrapper& call_wrapper,
                                 CallKind call_kind) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   Label done;
   bool definitely_mismatches = false;
+  // r1: must hold function pointer
+  // actual: must be r0 if register
+  ASSERT(actual.is_immediate() || actual.reg().is(r0));
+  ASSERT(!code.is(sh4_ip) && !code.is(sh4_rtmp) && !code.is(r5));
+
+  RECORD_LINE();
   InvokePrologue(expected, actual, Handle<Code>::null(), code,
                  &done, &definitely_mismatches, flag,
                  call_wrapper, call_kind);
   if (!definitely_mismatches) {
     if (flag == CALL_FUNCTION) {
-      call_wrapper.BeforeCall(CallSize(code));
+      call_wrapper.BeforeCall(2 * kInstrSize);
       SetCallKind(r5, call_kind);
-      Call(code);
+      jsr(code);
       call_wrapper.AfterCall();
     } else {
       ASSERT(flag == JUMP_FUNCTION);
       SetCallKind(r5, call_kind);
       Jump(code);
     }
 
     // Continue here if InvokePrologue does handle the invocation due to
     // mismatched parameter counts.
     bind(&done);
@@ skipping 38 matching lines @@
                                     CallKind call_kind) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   // Contract with called JS functions requires that function is passed in r1.
   ASSERT(fun.is(r1));
 
   Register expected_reg = r2;
   Register code_reg = r3;
 
+  RECORD_LINE();
   ldr(code_reg, FieldMemOperand(r1, JSFunction::kSharedFunctionInfoOffset));
   ldr(cp, FieldMemOperand(r1, JSFunction::kContextOffset));
   ldr(expected_reg,
       FieldMemOperand(code_reg,
                       SharedFunctionInfo::kFormalParameterCountOffset));
-  mov(expected_reg, Operand(expected_reg, ASR, kSmiTagSize));
+  asr(expected_reg, expected_reg, Operand(kSmiTagSize));
   ldr(code_reg,
       FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
 
   ParameterCount expected(expected_reg);
   InvokeCode(code_reg, expected, actual, flag, call_wrapper, call_kind);
 }
 
 
 void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper,
                                     CallKind call_kind) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   // Get the function and setup the context.
   LoadHeapObject(r1, function);
   ldr(cp, FieldMemOperand(r1, JSFunction::kContextOffset));
 
   ParameterCount expected(function->shared()->formal_parameter_count());
+  // TODO(STM): only for crankshaft ?
   // We call indirectly through the code field in the function to
   // allow recompilation to take effect without changing any of the
   // call sites.
   ldr(r3, FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
   InvokeCode(r3, expected, actual, flag, call_wrapper, call_kind);
 }
 
 
 void MacroAssembler::IsObjectJSObjectType(Register heap_object,
                                           Register map,
                                           Register scratch,
                                           Label* fail) {
   ldr(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
   IsInstanceJSObjectType(map, scratch, fail);
 }
 
 
 void MacroAssembler::IsInstanceJSObjectType(Register map,
                                             Register scratch,
                                             Label* fail) {
   ldrb(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
-  cmp(scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
-  b(lt, fail);
-  cmp(scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
-  b(gt, fail);
+  cmpge(scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+  bf(fail);
+  cmpgt(scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
+  bt(fail);
 }
 
 
 void MacroAssembler::IsObjectJSStringType(Register object,
                                           Register scratch,
                                           Label* fail) {
   ASSERT(kNotStringTag != 0);
 
+  ASSERT(!object.is(sh4_ip) && !scratch.is(sh4_ip));
+  ASSERT(!object.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+
   ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   tst(scratch, Operand(kIsNotStringMask));
-  b(ne, fail);
+  bf(fail);
 }
 
 
 #ifdef ENABLE_DEBUGGER_SUPPORT
 void MacroAssembler::DebugBreak() {
-  mov(r0, Operand(0, RelocInfo::NONE));
-  mov(r1, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));
-  CEntryStub ces(1);
-  ASSERT(AllowThisStubCall(&ces));
-  Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);
+  RECORD_LINE();
+  UNIMPLEMENTED_BREAK();
 }
 #endif
 
 
 void MacroAssembler::PushTryHandler(StackHandler::Kind kind,
                                     int handler_index) {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // For the JSEntry handler, we must preserve r0-r4, r5-r7 are available.
   // We will build up the handler from the bottom by pushing on the stack.
   // Set up the code object (r5) and the state (r6) for pushing.
   unsigned state =
       StackHandler::IndexField::encode(handler_index) |
       StackHandler::KindField::encode(kind);
   mov(r5, Operand(CodeObject()));
   mov(r6, Operand(state));
 
   // Push the frame pointer, context, state, and code object.
   if (kind == StackHandler::JS_ENTRY) {
     mov(r7, Operand(Smi::FromInt(0)));  // Indicates no context.
-    mov(ip, Operand(0, RelocInfo::NONE));  // NULL frame pointer.
-    stm(db_w, sp, r5.bit() | r6.bit() | r7.bit() | ip.bit());
+    mov(sh4_ip, Operand(0, RelocInfo::NONE));  // NULL frame pointer.
+    Push(sh4_ip, r7, r6, r5);
   } else {
-    stm(db_w, sp, r5.bit() | r6.bit() | cp.bit() | fp.bit());
+    Push(fp, cp, r6, r5);
   }
 
   // Link the current handler as the next handler.
   mov(r6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
   ldr(r5, MemOperand(r6));
   push(r5);
   // Set this new handler as the current one.
   str(sp, MemOperand(r6));
 }
 
 
 void MacroAssembler::PopTryHandler() {
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
+  RECORD_LINE();
   pop(r1);
-  mov(ip, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
+  mov(sh4_ip, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
   add(sp, sp, Operand(StackHandlerConstants::kSize - kPointerSize));
-  str(r1, MemOperand(ip));
+  str(r1, MemOperand(sh4_ip));
 }
 
 
 void MacroAssembler::JumpToHandlerEntry() {
   // Compute the handler entry address and jump to it.  The handler table is
   // a fixed array of (smi-tagged) code offsets.
   // r0 = exception, r1 = code object, r2 = state.
   ldr(r3, FieldMemOperand(r1, Code::kHandlerTableOffset));  // Handler table.
   add(r3, r3, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
-  mov(r2, Operand(r2, LSR, StackHandler::kKindWidth));  // Handler index.
-  ldr(r2, MemOperand(r3, r2, LSL, kPointerSizeLog2));  // Smi-tagged offset.
+  lsr(r2, r2, Operand(StackHandler::kKindWidth));  // Handler index.
+  lsl(r2, r2, Operand(kPointerSizeLog2));
+  ldr(r2, MemOperand(r3, r2));  // Smi-tagged offset.
   add(r1, r1, Operand(Code::kHeaderSize - kHeapObjectTag));  // Code start.
-  add(pc, r1, Operand(r2, ASR, kSmiTagSize));  // Jump.
+  asr(sh4_ip, r2, Operand(kSmiTagSize));
+  add(sh4_ip, r1, sh4_ip);
+  jmp(sh4_ip);  // Jump.
 }
 
 
 void MacroAssembler::Throw(Register value) {
+  ASSERT(!value.is(sh4_ip));
+  ASSERT(!value.is(sh4_rtmp));
+
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in r0.
   if (!value.is(r0)) {
     mov(r0, value);
   }
   // Drop the stack pointer to the top of the top handler.
   mov(r3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
   ldr(sp, MemOperand(r3));
   // Restore the next handler.
   pop(r2);
   str(r2, MemOperand(r3));
 
   // Get the code object (r1) and state (r2).  Restore the context and frame
   // pointer.
-  ldm(ia_w, sp, r1.bit() | r2.bit() | cp.bit() | fp.bit());
+  Pop(fp, cp, r2, r1);
 
   // If the handler is a JS frame, restore the context to the frame.
   // (kind == ENTRY) == (fp == 0) == (cp == 0), so we could test either fp
   // or cp.
+  Label skip;
   tst(cp, cp);
-  str(cp, MemOperand(fp, StandardFrameConstants::kContextOffset), ne);
+  bt(&skip);
+  str(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+  bind(&skip);
 
   JumpToHandlerEntry();
 }
 
 
 void MacroAssembler::ThrowUncatchable(Register value) {
   // Adjust this code if not the case.
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in r0.
   if (!value.is(r0)) {
+    RECORD_LINE();
     mov(r0, value);
   }
+
+  RECORD_LINE();
   // Drop the stack pointer to the top of the top stack handler.
   mov(r3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
   ldr(sp, MemOperand(r3));
 
   // Unwind the handlers until the ENTRY handler is found.
   Label fetch_next, check_kind;
   jmp(&check_kind);
   bind(&fetch_next);
   ldr(sp, MemOperand(sp, StackHandlerConstants::kNextOffset));
 
   bind(&check_kind);
   STATIC_ASSERT(StackHandler::JS_ENTRY == 0);
   ldr(r2, MemOperand(sp, StackHandlerConstants::kStateOffset));
   tst(r2, Operand(StackHandler::KindField::kMask));
   b(ne, &fetch_next);
 
   // Set the top handler address to next handler past the top ENTRY handler.
   pop(r2);
   str(r2, MemOperand(r3));
   // Get the code object (r1) and state (r2).  Clear the context and frame
   // pointer (0 was saved in the handler).
-  ldm(ia_w, sp, r1.bit() | r2.bit() | cp.bit() | fp.bit());
+  Pop(fp, cp, r2, r1);
 
   JumpToHandlerEntry();
 }
 
 
 void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
                                             Register scratch,
                                             Label* miss) {
   Label same_contexts;
 
@@ skipping 24 matching lines @@
     // Read the first word and compare to the native_context_map.
     ldr(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
     LoadRoot(ip, Heap::kNativeContextMapRootIndex);
     cmp(holder_reg, ip);
     Check(eq, "JSGlobalObject::native_context should be a native context.");
     pop(holder_reg);  // Restore holder.
   }
 
   // Check if both contexts are the same.
   ldr(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
-  cmp(scratch, Operand(ip));
+  cmp(scratch, ip);
   b(eq, &same_contexts);
 
   // Check the context is a native context.
   if (emit_debug_code()) {
     // TODO(119): avoid push(holder_reg)/pop(holder_reg)
     // Cannot use ip as a temporary in this verification code. Due to the fact
     // that ip is clobbered as part of cmp with an object Operand.
     push(holder_reg);  // Temporarily save holder on the stack.
     mov(holder_reg, ip);  // Move ip to its holding place.
     LoadRoot(ip, Heap::kNullValueRootIndex);
@@ skipping 11 matching lines @@
   }
 
   // Check that the security token in the calling global object is
   // compatible with the security token in the receiving global
   // object.
   int token_offset = Context::kHeaderSize +
                      Context::SECURITY_TOKEN_INDEX * kPointerSize;
 
   ldr(scratch, FieldMemOperand(scratch, token_offset));
   ldr(ip, FieldMemOperand(ip, token_offset));
-  cmp(scratch, Operand(ip));
+  cmp(scratch, ip);
   b(ne, miss);
 
   bind(&same_contexts);
 }
 
 
 void MacroAssembler::GetNumberHash(Register t0, Register scratch) {
   // First of all we assign the hash seed to scratch.
   LoadRoot(scratch, Heap::kHashSeedRootIndex);
   SmiUntag(scratch);
 
   // Xor original key with a seed.
-  eor(t0, t0, Operand(scratch));
+  eor(t0, t0, scratch);
 
   // Compute the hash code from the untagged key.  This must be kept in sync
   // with ComputeIntegerHash in utils.h.
   //
   // hash = ~hash + (hash << 15);
-  mvn(scratch, Operand(t0));
-  add(t0, scratch, Operand(t0, LSL, 15));
+  mvn(scratch, t0);
+  lsl(t0, t0, Operand(15));
+  add(t0, scratch, t0);
   // hash = hash ^ (hash >> 12);
-  eor(t0, t0, Operand(t0, LSR, 12));
+  lsr(scratch, t0, Operand(12));
+  eor(t0, t0, scratch);
   // hash = hash + (hash << 2);
-  add(t0, t0, Operand(t0, LSL, 2));
+  lsl(scratch, t0, Operand(2));
+  add(t0, t0, scratch);
   // hash = hash ^ (hash >> 4);
-  eor(t0, t0, Operand(t0, LSR, 4));
+  lsr(scratch, t0, Operand(4));
+  eor(t0, t0, scratch);
   // hash = hash * 2057;
-  mov(scratch, Operand(t0, LSL, 11));
-  add(t0, t0, Operand(t0, LSL, 3));
+  lsl(scratch, t0, Operand(11));
+  lsl(sh4_ip, t0, Operand(3));
+  add(t0, t0, sh4_ip);
   add(t0, t0, scratch);
   // hash = hash ^ (hash >> 16);
-  eor(t0, t0, Operand(t0, LSR, 16));
+  lsr(scratch, t0, Operand(16));
+  eor(t0, t0, scratch);
 }
 
 
 void MacroAssembler::LoadFromNumberDictionary(Label* miss,
                                               Register elements,
                                               Register key,
                                               Register result,
                                               Register t0,
                                               Register t1,
                                               Register t2) {
@@ skipping 16 matching lines @@
   //
   // t1 - used to hold the capacity mask of the dictionary
   //
   // t2 - used for the index into the dictionary.
   Label done;
 
   GetNumberHash(t0, t1);
 
   // Compute the capacity mask.
   ldr(t1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
-  mov(t1, Operand(t1, ASR, kSmiTagSize));  // convert smi to int
+  asr(t1, t1, Operand(kSmiTagSize));  // convert smi to int
   sub(t1, t1, Operand(1));
 
   // Generate an unrolled loop that performs a few probes before giving up.
   static const int kProbes = 4;
   for (int i = 0; i < kProbes; i++) {
     // Use t2 for index calculations and keep the hash intact in t0.
     mov(t2, t0);
     // Compute the masked index: (hash + i + i * i) & mask.
     if (i > 0) {
       add(t2, t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
     }
-    and_(t2, t2, Operand(t1));
+    land(t2, t2, t1);
 
     // Scale the index by multiplying by the element size.
     ASSERT(SeededNumberDictionary::kEntrySize == 3);
-    add(t2, t2, Operand(t2, LSL, 1));  // t2 = t2 * 3
+    lsl(ip, t2, Operand(1));
+    add(t2, t2, ip);  // t2 = t2 * 3
 
     // Check if the key is identical to the name.
-    add(t2, elements, Operand(t2, LSL, kPointerSizeLog2));
+    lsl(ip, t2, Operand(kPointerSizeLog2));
+    add(t2, elements, ip);
     ldr(ip, FieldMemOperand(t2, SeededNumberDictionary::kElementsStartOffset));
-    cmp(key, Operand(ip));
+    cmp(key, ip);
     if (i != kProbes - 1) {
       b(eq, &done);
     } else {
       b(ne, miss);
     }
   }
 
   bind(&done);
   // Check that the value is a normal property.
   // t2: elements + (index * kPointerSize)
   const int kDetailsOffset =
       SeededNumberDictionary::kElementsStartOffset + 2 * kPointerSize;
   ldr(t1, FieldMemOperand(t2, kDetailsOffset));
   tst(t1, Operand(Smi::FromInt(PropertyDetails::TypeField::kMask)));
   b(ne, miss);
 
   // Get the value at the masked, scaled index and return.
   const int kValueOffset =
       SeededNumberDictionary::kElementsStartOffset + kPointerSize;
   ldr(result, FieldMemOperand(t2, kValueOffset));
 }
 
 
 void MacroAssembler::AllocateInNewSpace(int object_size,
                                         Register result,
                                         Register scratch1,
                                         Register scratch2,
                                         Label* gc_required,
                                         AllocationFlags flags) {
+  RECORD_LINE();
   if (!FLAG_inline_new) {
     if (emit_debug_code()) {
       // Trash the registers to simulate an allocation failure.
+      RECORD_LINE();
       mov(result, Operand(0x7091));
       mov(scratch1, Operand(0x7191));
       mov(scratch2, Operand(0x7291));
     }
+    RECORD_LINE();
     jmp(gc_required);
     return;
   }
 
-  ASSERT(!result.is(scratch1));
-  ASSERT(!result.is(scratch2));
-  ASSERT(!scratch1.is(scratch2));
-  ASSERT(!scratch1.is(ip));
-  ASSERT(!scratch2.is(ip));
+  // Assert that the register arguments are different and that none of
+  // them are ip. ip is used explicitly in the code generated below.
+  ASSERT(!result.is(scratch1) && !result.is(scratch2) &&
+         !scratch1.is(scratch2));
+  ASSERT(!result.is(sh4_ip) && !scratch1.is(sh4_ip) &&
+         !scratch2.is(sh4_ip));
+  ASSERT(!result.is(sh4_rtmp) && !scratch1.is(sh4_rtmp) &&
+         !scratch2.is(sh4_rtmp));
 
   // Make object size into bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
     object_size *= kPointerSize;
   }
   ASSERT_EQ(0, object_size & kObjectAlignmentMask);
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDM.
   // Also, assert that the registers are numbered such that the values
   // are loaded in the correct order.
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
   ExternalReference new_space_allocation_limit =
       ExternalReference::new_space_allocation_limit_address(isolate());
   intptr_t top   =
       reinterpret_cast<intptr_t>(new_space_allocation_top.address());
   intptr_t limit =
       reinterpret_cast<intptr_t>(new_space_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
   ASSERT(result.code() < ip.code());
 
   // Set up allocation top address and object size registers.
   Register topaddr = scratch1;
   Register obj_size_reg = scratch2;
+  RECORD_LINE();
   mov(topaddr, Operand(new_space_allocation_top));
-  Operand obj_size_operand = Operand(object_size);
-  if (!obj_size_operand.is_single_instruction(this)) {
-    // We are about to steal IP, so we need to load this value first
-    mov(obj_size_reg, obj_size_operand);
-  }
+  mov(obj_size_reg, Operand(object_size));
 
   // This code stores a temporary value in ip. This is OK, as the code below
   // does not need ip for implicit literal generation.
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
+    RECORD_LINE();
     // Load allocation top into result and allocation limit into ip.
-    ldm(ia, topaddr, result.bit() | ip.bit());
+    ldr(result, MemOperand(topaddr));
+    ldr(ip, MemOperand(topaddr, 4));
   } else {
     if (emit_debug_code()) {
+      RECORD_LINE();
       // Assert that result actually contains top on entry. ip is used
       // immediately below so this use of ip does not cause difference with
       // respect to register content between debug and release mode.
       ldr(ip, MemOperand(topaddr));
       cmp(result, ip);
       Check(eq, "Unexpected allocation top");
     }
+    RECORD_LINE();
     // Load allocation limit into ip. Result already contains allocation top.
     ldr(ip, MemOperand(topaddr, limit - top));
   }
 
+  RECORD_LINE();
   // Calculate new top and bail out if new space is exhausted. Use result
   // to calculate the new top.
-  if (obj_size_operand.is_single_instruction(this)) {
-    // We can add the size as an immediate
-    add(scratch2, result, obj_size_operand, SetCC);
-  } else {
-    // Doesn't fit in an immediate, we have to use the register
-    add(scratch2, result, obj_size_reg, SetCC);
-  }
-  b(cs, gc_required);
-  cmp(scratch2, Operand(ip));
-  b(hi, gc_required);
+  addc(scratch2, result, obj_size_reg);
+  b(t, gc_required);
+
+  RECORD_LINE();
+  cmphi(scratch2, sh4_ip);
+  bt(gc_required);
+
+  RECORD_LINE();
   str(scratch2, MemOperand(topaddr));
 
   // Tag object if requested.
   if ((flags & TAG_OBJECT) != 0) {
+    RECORD_LINE();
     add(result, result, Operand(kHeapObjectTag));
   }
 }
 
 
 void MacroAssembler::AllocateInNewSpace(Register object_size,
                                         Register result,
                                         Register scratch1,
                                         Register scratch2,
                                         Label* gc_required,
                                         AllocationFlags flags) {
+  RECORD_LINE();
   if (!FLAG_inline_new) {
     if (emit_debug_code()) {
       // Trash the registers to simulate an allocation failure.
+      RECORD_LINE();
       mov(result, Operand(0x7091));
       mov(scratch1, Operand(0x7191));
       mov(scratch2, Operand(0x7291));
     }
+    RECORD_LINE();
     jmp(gc_required);
     return;
   }
 
   // Assert that the register arguments are different and that none of
   // them are ip. ip is used explicitly in the code generated below.
+  // Also assert that rtmp is not used as it is used in assembler-sh4.cc.
   ASSERT(!result.is(scratch1));
   ASSERT(!result.is(scratch2));
   ASSERT(!scratch1.is(scratch2));
-  ASSERT(!object_size.is(ip));
-  ASSERT(!result.is(ip));
-  ASSERT(!scratch1.is(ip));
-  ASSERT(!scratch2.is(ip));
+  ASSERT(!result.is(sh4_ip));
+  ASSERT(!scratch1.is(sh4_ip));
+  ASSERT(!scratch2.is(sh4_ip));
+  ASSERT(!result.is(sh4_rtmp));
+  ASSERT(!scratch1.is(sh4_rtmp));
+  ASSERT(!scratch2.is(sh4_rtmp));
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDM.
   // Also, assert that the registers are numbered such that the values
   // are loaded in the correct order.
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
   ExternalReference new_space_allocation_limit =
       ExternalReference::new_space_allocation_limit_address(isolate());
   intptr_t top =
       reinterpret_cast<intptr_t>(new_space_allocation_top.address());
   intptr_t limit =
       reinterpret_cast<intptr_t>(new_space_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
   ASSERT(result.code() < ip.code());
 
   // Set up allocation top address.
   Register topaddr = scratch1;
+
+  RECORD_LINE();
   mov(topaddr, Operand(new_space_allocation_top));
 
   // This code stores a temporary value in ip. This is OK, as the code below
   // does not need ip for implicit literal generation.
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
+    RECORD_LINE();
     // Load allocation top into result and allocation limit into ip.
-    ldm(ia, topaddr, result.bit() | ip.bit());
+    ldr(result, MemOperand(topaddr));
+    ldr(ip, MemOperand(topaddr, 4));
   } else {
     if (emit_debug_code()) {
+      RECORD_LINE();
       // Assert that result actually contains top on entry. ip is used
       // immediately below so this use of ip does not cause difference with
       // respect to register content between debug and release mode.
       ldr(ip, MemOperand(topaddr));
       cmp(result, ip);
       Check(eq, "Unexpected allocation top");
     }
+    RECORD_LINE();
     // Load allocation limit into ip. Result already contains allocation top.
     ldr(ip, MemOperand(topaddr, limit - top));
   }
 
+  RECORD_LINE();
   // Calculate new top and bail out if new space is exhausted. Use result
   // to calculate the new top. Object size may be in words so a shift is
   // required to get the number of bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
-    add(scratch2, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC);
+    RECORD_LINE();
+    lsl(scratch2, object_size, Operand(kPointerSizeLog2));
+    addc(scratch2, result, scratch2);
   } else {
-    add(scratch2, result, Operand(object_size), SetCC);
+    RECORD_LINE();
+    addc(scratch2, result, object_size);
   }
-  b(cs, gc_required);
-  cmp(scratch2, Operand(ip));
-  b(hi, gc_required);
+  RECORD_LINE();
+  b(t, gc_required);
+  RECORD_LINE();
+  cmphi(scratch2, sh4_ip);
+  bt(gc_required);
+  RECORD_LINE();
 
   // Update allocation top. result temporarily holds the new top.
   if (emit_debug_code()) {
+    RECORD_LINE();
     tst(scratch2, Operand(kObjectAlignmentMask));
     Check(eq, "Unaligned allocation in new space");
   }
+  RECORD_LINE();
   str(scratch2, MemOperand(topaddr));
 
   // Tag object if requested.
   if ((flags & TAG_OBJECT) != 0) {
+    RECORD_LINE();
     add(result, result, Operand(kHeapObjectTag));
   }
 }
 
 
 void MacroAssembler::UndoAllocationInNewSpace(Register object,
                                               Register scratch) {
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
 
   // Make sure the object has no tag before resetting top.
-  and_(object, object, Operand(~kHeapObjectTagMask));
+  land(object, object, Operand(~kHeapObjectTagMask));
 #ifdef DEBUG
   // Check that the object un-allocated is below the current top.
   mov(scratch, Operand(new_space_allocation_top));
   ldr(scratch, MemOperand(scratch));
-  cmp(object, scratch);
-  Check(lt, "Undo allocation of non allocated memory");
+  cmpge(object, scratch);
+  Check(ne, "Undo allocation of non allocated memory");
 #endif
   // Write the address of the object to un-allocate as the current top.
   mov(scratch, Operand(new_space_allocation_top));
   str(object, MemOperand(scratch));
 }
 
 
 void MacroAssembler::AllocateTwoByteString(Register result,
                                            Register length,
                                            Register scratch1,
                                            Register scratch2,
                                            Register scratch3,
                                            Label* gc_required) {
   // Calculate the number of bytes needed for the characters in the string while
   // observing object alignment.
   ASSERT((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
-  mov(scratch1, Operand(length, LSL, 1));  // Length in bytes, not chars.
+  RECORD_LINE();
+  lsl(scratch1, length, Operand(1));  // Length in bytes, not chars.
   add(scratch1, scratch1,
       Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
-  and_(scratch1, scratch1, Operand(~kObjectAlignmentMask));
+  land(scratch1, scratch1, Operand(~kObjectAlignmentMask));
 
   // Allocate two-byte string in new space.
   AllocateInNewSpace(scratch1,
                      result,
                      scratch2,
                      scratch3,
                      gc_required,
                      TAG_OBJECT);
 
   // Set the map, length and hash field.
+  RECORD_LINE();
   InitializeNewString(result,
                       length,
                       Heap::kStringMapRootIndex,
                       scratch1,
                       scratch2);
 }
 
 
 void MacroAssembler::AllocateAsciiString(Register result,
                                          Register length,
                                          Register scratch1,
                                          Register scratch2,
                                          Register scratch3,
                                          Label* gc_required) {
   // Calculate the number of bytes needed for the characters in the string while
   // observing object alignment.
   ASSERT((SeqAsciiString::kHeaderSize & kObjectAlignmentMask) == 0);
   ASSERT(kCharSize == 1);
+  RECORD_LINE();
   add(scratch1, length,
       Operand(kObjectAlignmentMask + SeqAsciiString::kHeaderSize));
-  and_(scratch1, scratch1, Operand(~kObjectAlignmentMask));
+  land(scratch1, scratch1, Operand(~kObjectAlignmentMask));
 
   // Allocate ASCII string in new space.
   AllocateInNewSpace(scratch1,
                      result,
                      scratch2,
                      scratch3,
                      gc_required,
                      TAG_OBJECT);
 
+  RECORD_LINE();
   // Set the map, length and hash field.
   InitializeNewString(result,
                       length,
                       Heap::kAsciiStringMapRootIndex,
                       scratch1,
                       scratch2);
 }
 
 
 void MacroAssembler::AllocateTwoByteConsString(Register result,
                                                Register length,
                                                Register scratch1,
                                                Register scratch2,
                                                Label* gc_required) {
+  RECORD_LINE();
   AllocateInNewSpace(ConsString::kSize,
                      result,
                      scratch1,
                      scratch2,
                      gc_required,
                      TAG_OBJECT);
 
+  RECORD_LINE();
   InitializeNewString(result,
                       length,
                       Heap::kConsStringMapRootIndex,
                       scratch1,
                       scratch2);
 }
 
 
 void MacroAssembler::AllocateAsciiConsString(Register result,
                                              Register length,
                                              Register scratch1,
                                              Register scratch2,
                                              Label* gc_required) {
+  RECORD_LINE();
   AllocateInNewSpace(ConsString::kSize,
                      result,
                      scratch1,
                      scratch2,
                      gc_required,
                      TAG_OBJECT);
 
+  RECORD_LINE();
   InitializeNewString(result,
                       length,
                       Heap::kConsAsciiStringMapRootIndex,
                       scratch1,
                       scratch2);
 }
 
 
 void MacroAssembler::AllocateTwoByteSlicedString(Register result,
                                                  Register length,
@@ skipping 31 matching lines @@
                       length,
                       Heap::kSlicedAsciiStringMapRootIndex,
                       scratch1,
                       scratch2);
 }
 
 
 void MacroAssembler::CompareObjectType(Register object,
                                        Register map,
                                        Register type_reg,
-                                       InstanceType type) {
+                                       InstanceType type,
+                                       Condition cond) {
+  ASSERT(!object.is(sh4_ip) && !map.is(sh4_ip) && !type_reg.is(sh4_ip));
+  ASSERT(!object.is(sh4_rtmp) && !map.is(sh4_rtmp) && !type_reg.is(sh4_rtmp));
+
+  RECORD_LINE();
   ldr(map, FieldMemOperand(object, HeapObject::kMapOffset));
-  CompareInstanceType(map, type_reg, type);
+  CompareInstanceType(map, type_reg, type, cond);
 }
 
 
 void MacroAssembler::CompareInstanceType(Register map,
                                          Register type_reg,
-                                         InstanceType type) {
+                                         InstanceType type,
+                                         Condition cond) {
+  ASSERT(!map.is(sh4_rtmp) && !type_reg.is(sh4_rtmp));
+
+  RECORD_LINE();
   ldrb(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
-  cmp(type_reg, Operand(type));
+  switch (cond) {
+  case eq:
+    RECORD_LINE();
+    cmpeq(type_reg, Operand(type));
+    break;
+  case ge:
+    RECORD_LINE();
+    cmpge(type_reg, Operand(type));
+    break;
+  case hs:
+    RECORD_LINE();
+    cmphs(type_reg, Operand(type));
+    break;
+  case gt:
+    RECORD_LINE();
+    cmpgt(type_reg, Operand(type));
+    break;
+  default:
+    UNIMPLEMENTED();
+  }
 }
 
 
 void MacroAssembler::CompareRoot(Register obj,
                                  Heap::RootListIndex index) {
-  ASSERT(!obj.is(ip));
+  ASSERT(!obj.is(sh4_ip));
+  ASSERT(!obj.is(sh4_rtmp));
+  RECORD_LINE();
   LoadRoot(ip, index);
-  cmp(obj, ip);
+  cmpeq(obj, ip);
 }
 
 
 void MacroAssembler::CheckFastElements(Register map,
                                        Register scratch,
                                        Label* fail) {
   STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
   STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
   STATIC_ASSERT(FAST_ELEMENTS == 2);
   STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
   ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
-  cmp(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
-  b(hi, fail);
+  cmphi(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
+  bt(fail);
 }
 
 
 void MacroAssembler::CheckFastObjectElements(Register map,
                                              Register scratch,
                                              Label* fail) {
   STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
   STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
   STATIC_ASSERT(FAST_ELEMENTS == 2);
   STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
   ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
-  cmp(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
-  b(ls, fail);
-  cmp(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
-  b(hi, fail);
+  cmpgt(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+  bf(fail);
+  cmphi(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
+  bt(fail);
 }
 
-
 void MacroAssembler::CheckFastSmiElements(Register map,
                                           Register scratch,
                                           Label* fail) {
   STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
   STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
   ldrb(scratch, FieldMemOperand(map, Map::kBitField2Offset));
-  cmp(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
-  b(hi, fail);
+  cmphi(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+  bt(fail);
 }
 
 
 void MacroAssembler::StoreNumberToDoubleElements(Register value_reg,
                                                  Register key_reg,
                                                  Register receiver_reg,
                                                  Register elements_reg,
                                                  Register scratch1,
                                                  Register scratch2,
                                                  Register scratch3,
                                                  Register scratch4,
                                                  Label* fail) {
-  Label smi_value, maybe_nan, have_double_value, is_nan, done;
-  Register mantissa_reg = scratch2;
-  Register exponent_reg = scratch3;
+  UNIMPLEMENTED_BREAK();
+}
 
-  // Handle smi values specially.
-  JumpIfSmi(value_reg, &smi_value);
-
-  // Ensure that the object is a heap number
-  CheckMap(value_reg,
-           scratch1,
-           isolate()->factory()->heap_number_map(),
-           fail,
-           DONT_DO_SMI_CHECK);
-
-  // Check for nan: all NaN values have a value greater (signed) than 0x7ff00000
-  // in the exponent.
-  mov(scratch1, Operand(kNaNOrInfinityLowerBoundUpper32));
-  ldr(exponent_reg, FieldMemOperand(value_reg, HeapNumber::kExponentOffset));
-  cmp(exponent_reg, scratch1);
-  b(ge, &maybe_nan);
-
-  ldr(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
-
-  bind(&have_double_value);
-  add(scratch1, elements_reg,
-      Operand(key_reg, LSL, kDoubleSizeLog2 - kSmiTagSize));
-  str(mantissa_reg, FieldMemOperand(scratch1, FixedDoubleArray::kHeaderSize));
-  uint32_t offset = FixedDoubleArray::kHeaderSize + sizeof(kHoleNanLower32);
-  str(exponent_reg, FieldMemOperand(scratch1, offset));
-  jmp(&done);
-
-  bind(&maybe_nan);
-  // Could be NaN or Infinity. If fraction is not zero, it's NaN, otherwise
-  // it's an Infinity, and the non-NaN code path applies.
-  b(gt, &is_nan);
-  ldr(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
-  cmp(mantissa_reg, Operand(0));
-  b(eq, &have_double_value);
-  bind(&is_nan);
-  // Load canonical NaN for storing into the double array.
-  uint64_t nan_int64 = BitCast<uint64_t>(
-      FixedDoubleArray::canonical_not_the_hole_nan_as_double());
-  mov(mantissa_reg, Operand(static_cast<uint32_t>(nan_int64)));
-  mov(exponent_reg, Operand(static_cast<uint32_t>(nan_int64 >> 32)));
-  jmp(&have_double_value);
-
-  bind(&smi_value);
-  add(scratch1, elements_reg,
-      Operand(FixedDoubleArray::kHeaderSize - kHeapObjectTag));
-  add(scratch1, scratch1,
-      Operand(key_reg, LSL, kDoubleSizeLog2 - kSmiTagSize));
-  // scratch1 is now effective address of the double element
-
-  FloatingPointHelper::Destination destination;
-  if (CpuFeatures::IsSupported(VFP2)) {
-    destination = FloatingPointHelper::kVFPRegisters;
-  } else {
-    destination = FloatingPointHelper::kCoreRegisters;
-  }
-
-  Register untagged_value = elements_reg;
-  SmiUntag(untagged_value, value_reg);
-  FloatingPointHelper::ConvertIntToDouble(this,
-                                          untagged_value,
-                                          destination,
-                                          d0,
-                                          mantissa_reg,
-                                          exponent_reg,
-                                          scratch4,
-                                          s2);
-  if (destination == FloatingPointHelper::kVFPRegisters) {
-    CpuFeatures::Scope scope(VFP2);
-    vstr(d0, scratch1, 0);
-  } else {
-    str(mantissa_reg, MemOperand(scratch1, 0));
-    str(exponent_reg, MemOperand(scratch1, Register::kSizeInBytes));
-  }
-  bind(&done);
-}
 
 
 void MacroAssembler::CompareMap(Register obj,
                                 Register scratch,
                                 Handle<Map> map,
                                 Label* early_success,
                                 CompareMapMode mode) {
   ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   CompareMap(scratch, map, early_success, mode);
 }
 
 
 void MacroAssembler::CompareMap(Register obj_map,
                                 Handle<Map> map,
                                 Label* early_success,
                                 CompareMapMode mode) {
-  cmp(obj_map, Operand(map));
+  cmpeq(obj_map, Operand(map));
   if (mode == ALLOW_ELEMENT_TRANSITION_MAPS) {
     ElementsKind kind = map->elements_kind();
     if (IsFastElementsKind(kind)) {
       bool packed = IsFastPackedElementsKind(kind);
       Map* current_map = *map;
       while (CanTransitionToMoreGeneralFastElementsKind(kind, packed)) {
         kind = GetNextMoreGeneralFastElementsKind(kind, packed);
         current_map = current_map->LookupElementsTransitionMap(kind);
         if (!current_map) break;
         b(eq, early_success);
-        cmp(obj_map, Operand(Handle<Map>(current_map)));
+        cmpeq(obj_map, Operand(Handle<Map>(current_map)));
       }
     }
   }
 }
 
 
+
 void MacroAssembler::CheckMap(Register obj,
                               Register scratch,
                               Handle<Map> map,
                               Label* fail,
                               SmiCheckType smi_check_type,
                               CompareMapMode mode) {
+  ASSERT(!obj.is(sh4_ip) && !scratch.is(sh4_ip));
+  ASSERT(!obj.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+  RECORD_LINE();
   if (smi_check_type == DO_SMI_CHECK) {
+    RECORD_LINE();
     JumpIfSmi(obj, fail);
   }
 
+  RECORD_LINE();
   Label success;
   CompareMap(obj, scratch, map, &success, mode);
   b(ne, fail);
   bind(&success);
 }
 
 
 void MacroAssembler::CheckMap(Register obj,
                               Register scratch,
                               Heap::RootListIndex index,
                               Label* fail,
                               SmiCheckType smi_check_type) {
+  ASSERT(!obj.is(sh4_ip) && !scratch.is(sh4_ip));
+  ASSERT(!obj.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+  RECORD_LINE();
   if (smi_check_type == DO_SMI_CHECK) {
+    RECORD_LINE();
     JumpIfSmi(obj, fail);
   }
+  RECORD_LINE();
   ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   LoadRoot(ip, index);
   cmp(scratch, ip);
   b(ne, fail);
 }
 
 
 void MacroAssembler::DispatchMap(Register obj,
                                  Register scratch,
                                  Handle<Map> map,
                                  Handle<Code> success,
                                  SmiCheckType smi_check_type) {
   Label fail;
   if (smi_check_type == DO_SMI_CHECK) {
-    JumpIfSmi(obj, &fail);
+    JumpIfSmi(obj, &fail, Label::kNear);
   }
   ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   mov(ip, Operand(map));
   cmp(scratch, ip);
-  Jump(success, RelocInfo::CODE_TARGET, eq);
+  Label skip;
+  bf(&skip);
+  Jump(success, RelocInfo::CODE_TARGET);
+  bind(&skip);
   bind(&fail);
 }
 
 
 void MacroAssembler::TryGetFunctionPrototype(Register function,
-                                             Register result,
-                                             Register scratch,
-                                             Label* miss,
-                                             bool miss_on_bound_function) {
+                             Register result,
+                             Register scratch,
+                             Label* miss,
+                             bool miss_on_bound_function) {
+  ASSERT(!function.is(sh4_ip) && !result.is(sh4_ip) && !scratch.is(sh4_ip));
+  ASSERT(!function.is(sh4_rtmp) && !result.is(sh4_rtmp) &&
+         !scratch.is(sh4_rtmp));
+
+  RECORD_LINE();
   // Check that the receiver isn't a smi.
   JumpIfSmi(function, miss);
 
   // Check that the function really is a function.  Load map into result reg.
-  CompareObjectType(function, result, scratch, JS_FUNCTION_TYPE);
-  b(ne, miss);
+  CompareObjectType(function, result, scratch, JS_FUNCTION_TYPE, eq);
+  bf(miss);
 
   if (miss_on_bound_function) {
+    RECORD_LINE();
     ldr(scratch,
         FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
     ldr(scratch,
         FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
     tst(scratch,
         Operand(Smi::FromInt(1 << SharedFunctionInfo::kBoundFunction)));
     b(ne, miss);
   }
 
+  RECORD_LINE();
   // Make sure that the function has an instance prototype.
   Label non_instance;
   ldrb(scratch, FieldMemOperand(result, Map::kBitFieldOffset));
   tst(scratch, Operand(1 << Map::kHasNonInstancePrototype));
-  b(ne, &non_instance);
+  bf_near(&non_instance);
 
+  RECORD_LINE();
   // Get the prototype or initial map from the function.
   ldr(result,
       FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
 
   // If the prototype or initial map is the hole, don't return it and
   // simply miss the cache instead. This will allow us to allocate a
   // prototype object on-demand in the runtime system.
   LoadRoot(ip, Heap::kTheHoleValueRootIndex);
   cmp(result, ip);
   b(eq, miss);
 
+  RECORD_LINE();
   // If the function does not have an initial map, we're done.
   Label done;
-  CompareObjectType(result, scratch, scratch, MAP_TYPE);
-  b(ne, &done);
+  CompareObjectType(result, scratch, scratch, MAP_TYPE, eq);
+  bf_near(&done);
 
+  RECORD_LINE();
   // Get the prototype from the initial map.
   ldr(result, FieldMemOperand(result, Map::kPrototypeOffset));
-  jmp(&done);
+  jmp_near(&done);
 
+  RECORD_LINE();
   // Non-instance prototype: Fetch prototype from constructor field
   // in initial map.
   bind(&non_instance);
   ldr(result, FieldMemOperand(result, Map::kConstructorOffset));
 
   // All done.
   bind(&done);
 }
 
 
-void MacroAssembler::CallStub(CodeStub* stub, Condition cond) {
+void MacroAssembler::CallStub(CodeStub* stub) {
   ASSERT(AllowThisStubCall(stub));  // Stub calls are not allowed in some stubs.
-  Call(stub->GetCode(), RelocInfo::CODE_TARGET, TypeFeedbackId::None(), cond);
+  Call(stub->GetCode(), RelocInfo::CODE_TARGET, TypeFeedbackId::None());
 }
 
 
-void MacroAssembler::TailCallStub(CodeStub* stub, Condition cond) {
+void MacroAssembler::TailCallStub(CodeStub* stub) {
   ASSERT(allow_stub_calls_ || stub->CompilingCallsToThisStubIsGCSafe());
-  Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond);
+  Jump(stub->GetCode(), RelocInfo::CODE_TARGET);
 }
 
 
 static int AddressOffset(ExternalReference ref0, ExternalReference ref1) {
   return ref0.address() - ref1.address();
 }
 
 
 void MacroAssembler::CallApiFunctionAndReturn(ExternalReference function,
                                               int stack_space) {
   ExternalReference next_address =
       ExternalReference::handle_scope_next_address();
   const int kNextOffset = 0;
   const int kLimitOffset = AddressOffset(
       ExternalReference::handle_scope_limit_address(),
       next_address);
   const int kLevelOffset = AddressOffset(
       ExternalReference::handle_scope_level_address(),
       next_address);
 
+  mov(r4, r0);
+  mov(r5, r1);
+
   // Allocate HandleScope in callee-save registers.
-  mov(r7, Operand(next_address));
-  ldr(r4, MemOperand(r7, kNextOffset));
-  ldr(r5, MemOperand(r7, kLimitOffset));
-  ldr(r6, MemOperand(r7, kLevelOffset));
-  add(r6, r6, Operand(1));
-  str(r6, MemOperand(r7, kLevelOffset));
+  // TODO(stm): use of r10 and r11 is dangerous here (ip and rtmp)
+  // We must be sure to not have them clobbered until the actual call.
+  mov(sh4_r11, Operand(next_address));
+  ldr(sh4_r8, MemOperand(sh4_r11, kNextOffset), r0);
+  ldr(r9, MemOperand(sh4_r11, kLimitOffset), r0);
+  ldr(sh4_r10, MemOperand(sh4_r11, kLevelOffset), r0);
+  add(sh4_r10, sh4_r10, Operand(1), r0);
+  str(sh4_r10, MemOperand(sh4_r11, kLevelOffset), r0);
 
   // Native call returns to the DirectCEntry stub which redirects to the
   // return address pushed on stack (could have moved after GC).
   // DirectCEntry stub itself is generated early and never moves.
-  DirectCEntryStub stub;
-  stub.GenerateCall(this, function);
+  // This scratch register must not be the return value
+  DirectCEntryStub stub(r2);
+  stub.GenerateCall(this, function, r0, r1);
+
+  // Move back the registers [r8, r11] => [r4, r7]
+  mov(r4, sh4_r8);
+  mov(r5, r9);
+  mov(r6, sh4_r10);
+  mov(r7, sh4_r11);
 
   Label promote_scheduled_exception;
   Label delete_allocated_handles;
   Label leave_exit_frame;
 
   // If result is non-zero, dereference to get the result value
   // otherwise set it to undefined.
+  Label ltrue, lfalse;
   cmp(r0, Operand(0));
-  LoadRoot(r0, Heap::kUndefinedValueRootIndex, eq);
-  ldr(r0, MemOperand(r0), ne);
+  bf_near(&lfalse);
+  LoadRoot(r0, Heap::kUndefinedValueRootIndex);
+  jmp_near(&ltrue);
+  bind(&lfalse);
+  ldr(r0, MemOperand(r0));
+  bind(&ltrue);
 
   // No more valid handles (the result handle was the last one). Restore
   // previous handle scope.
   str(r4, MemOperand(r7, kNextOffset));
   if (emit_debug_code()) {
     ldr(r1, MemOperand(r7, kLevelOffset));
     cmp(r1, r6);
     Check(eq, "Unexpected level after return from api call");
   }
   sub(r6, r6, Operand(1));
   str(r6, MemOperand(r7, kLevelOffset));
-  ldr(ip, MemOperand(r7, kLimitOffset));
-  cmp(r5, ip);
+  ldr(sh4_ip, MemOperand(r7, kLimitOffset));
+  cmp(r5, sh4_ip);
   b(ne, &delete_allocated_handles);
 
   // Check if the function scheduled an exception.
   bind(&leave_exit_frame);
   LoadRoot(r4, Heap::kTheHoleValueRootIndex);
-  mov(ip, Operand(ExternalReference::scheduled_exception_address(isolate())));
-  ldr(r5, MemOperand(ip));
+  mov(sh4_ip,
+      Operand(ExternalReference::scheduled_exception_address(isolate())));
+  ldr(r5, MemOperand(sh4_ip));
   cmp(r4, r5);
   b(ne, &promote_scheduled_exception);
 
   // LeaveExitFrame expects unwind space to be in a register.
   mov(r4, Operand(stack_space));
   LeaveExitFrame(false, r4);
-  mov(pc, lr);
+  rts();
 
   bind(&promote_scheduled_exception);
   TailCallExternalReference(
       ExternalReference(Runtime::kPromoteScheduledException, isolate()),
       0,
       1);
 
   // HandleScope limit has changed. Delete allocated extensions.
   bind(&delete_allocated_handles);
-  str(r5, MemOperand(r7, kLimitOffset));
-  mov(r4, r0);
-  PrepareCallCFunction(1, r5);
-  mov(r0, Operand(ExternalReference::isolate_address()));
+  // use r9 instead of r5 for making PrepareCallCFunction() happy
+  str(r9, MemOperand(r7, kLimitOffset));
+  mov(sh4_r8, r0);  // preserve in calle-saved the result (r0)
+  PrepareCallCFunction(1, r9);
+  mov(r4, Operand(ExternalReference::isolate_address()));  // C-ABI paramater
   CallCFunction(
       ExternalReference::delete_handle_scope_extensions(isolate()), 1);
-  mov(r0, r4);
+  mov(r0, sh4_r8);  // restore result (r0)
   jmp(&leave_exit_frame);
 }
 
 
 bool MacroAssembler::AllowThisStubCall(CodeStub* stub) {
   if (!has_frame_ && stub->SometimesSetsUpAFrame()) return false;
   return allow_stub_calls_ || stub->CompilingCallsToThisStubIsGCSafe();
 }
 
 
 void MacroAssembler::IllegalOperation(int num_arguments) {
+  RECORD_LINE();
   if (num_arguments > 0) {
     add(sp, sp, Operand(num_arguments * kPointerSize));
   }
   LoadRoot(r0, Heap::kUndefinedValueRootIndex);
 }
 
+void MacroAssembler::SmiToDoubleFPURegister(Register smi,
+                                            DwVfpRegister value,
+                                            Register scratch) {
+  asr(scratch, smi, Operand(kSmiTagSize));
+  dfloat(value, scratch);
+}
+
 
 void MacroAssembler::IndexFromHash(Register hash, Register index) {
   // If the hash field contains an array index pick it out. The assert checks
   // that the constants for the maximum number of digits for an array index
   // cached in the hash field and the number of bits reserved for it does not
   // conflict.
   ASSERT(TenToThe(String::kMaxCachedArrayIndexLength) <
          (1 << String::kArrayIndexValueBits));
   // We want the smi-tagged index in key.  kArrayIndexValueMask has zeros in
   // the low kHashShift bits.
   STATIC_ASSERT(kSmiTag == 0);
+  ASSERT(!hash.is(sh4_ip) && !index.is(sh4_ip));
+  ASSERT(!hash.is(sh4_rtmp) && !index.is(sh4_rtmp));
+  RECORD_LINE();
   Ubfx(hash, hash, String::kHashShift, String::kArrayIndexValueBits);
-  mov(index, Operand(hash, LSL, kSmiTagSize));
+  lsl(index, hash, Operand(kSmiTagSize));
 }
 
 
-void MacroAssembler::IntegerToDoubleConversionWithVFP3(Register inReg,
-                                                       Register outHighReg,
-                                                       Register outLowReg) {
-  // ARMv7 VFP3 instructions to implement integer to double conversion.
-  mov(r7, Operand(inReg, ASR, kSmiTagSize));
-  vmov(s15, r7);
-  vcvt_f64_s32(d7, s15);
-  vmov(outLowReg, outHighReg, d7);
-}
-
-
-void MacroAssembler::ObjectToDoubleVFPRegister(Register object,
-                                               DwVfpRegister result,
-                                               Register scratch1,
-                                               Register scratch2,
-                                               Register heap_number_map,
-                                               SwVfpRegister scratch3,
-                                               Label* not_number,
-                                               ObjectToDoubleFlags flags) {
-  Label done;
-  if ((flags & OBJECT_NOT_SMI) == 0) {
-    Label not_smi;
-    JumpIfNotSmi(object, &not_smi);
-    // Remove smi tag and convert to double.
-    mov(scratch1, Operand(object, ASR, kSmiTagSize));
-    vmov(scratch3, scratch1);
-    vcvt_f64_s32(result, scratch3);
-    b(&done);
-    bind(&not_smi);
-  }
-  // Check for heap number and load double value from it.
-  ldr(scratch1, FieldMemOperand(object, HeapObject::kMapOffset));
-  sub(scratch2, object, Operand(kHeapObjectTag));
-  cmp(scratch1, heap_number_map);
-  b(ne, not_number);
-  if ((flags & AVOID_NANS_AND_INFINITIES) != 0) {
-    // If exponent is all ones the number is either a NaN or +/-Infinity.
-    ldr(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
-    Sbfx(scratch1,
-         scratch1,
-         HeapNumber::kExponentShift,
-         HeapNumber::kExponentBits);
-    // All-one value sign extend to -1.
-    cmp(scratch1, Operand(-1));
-    b(eq, not_number);
-  }
-  vldr(result, scratch2, HeapNumber::kValueOffset);
-  bind(&done);
-}
-
-
-void MacroAssembler::SmiToDoubleVFPRegister(Register smi,
-                                            DwVfpRegister value,
-                                            Register scratch1,
-                                            SwVfpRegister scratch2) {
-  mov(scratch1, Operand(smi, ASR, kSmiTagSize));
-  vmov(scratch2, scratch1);
-  vcvt_f64_s32(value, scratch2);
-}
-
-
 // Tries to get a signed int32 out of a double precision floating point heap
 // number. Rounds towards 0. Branch to 'not_int32' if the double is out of the
 // 32bits signed integer range.
 void MacroAssembler::ConvertToInt32(Register source,
                                     Register dest,
                                     Register scratch,
                                     Register scratch2,
                                     DwVfpRegister double_scratch,
                                     Label *not_int32) {
-  if (CpuFeatures::IsSupported(VFP2)) {
-    CpuFeatures::Scope scope(VFP2);
+  ASSERT(!source.is(sh4_ip) && !dest.is(sh4_ip) && !scratch.is(sh4_ip) &&
+         !scratch2.is(sh4_ip));
+  ASSERT(!source.is(sh4_rtmp) && !dest.is(sh4_rtmp) && !scratch.is(sh4_rtmp) &&
+         !scratch2.is(sh4_rtmp));
+  ASSERT(!source.is(dest) && !source.is(scratch) && !source.is(scratch2) &&
+         !dest.is(scratch) && !dest.is(scratch2) && !scratch.is(scratch2));
+
+  if (CpuFeatures::IsSupported(FPU)) {
     sub(scratch, source, Operand(kHeapObjectTag));
-    vldr(double_scratch, scratch, HeapNumber::kValueOffset);
-    vcvt_s32_f64(double_scratch.low(), double_scratch);
-    vmov(dest, double_scratch.low());
+    dldr(double_scratch, MemOperand(scratch, HeapNumber::kValueOffset));
+    idouble(dest, double_scratch);
     // Signed vcvt instruction will saturate to the minimum (0x80000000) or
     // maximun (0x7fffffff) signed 32bits integer when the double is out of
     // range. When substracting one, the minimum signed integer becomes the
     // maximun signed integer.
     sub(scratch, dest, Operand(1));
-    cmp(scratch, Operand(LONG_MAX - 1));
+    cmpge(scratch, Operand(LONG_MAX - 1));
     // If equal then dest was LONG_MAX, if greater dest was LONG_MIN.
-    b(ge, not_int32);
+    bt(not_int32);
   } else {
     // This code is faster for doubles that are in the ranges -0x7fffffff to
     // -0x40000000 or 0x40000000 to 0x7fffffff. This corresponds almost to
     // the range of signed int32 values that are not Smis.  Jumps to the label
     // 'not_int32' if the double isn't in the range -0x80000000.0 to
     // 0x80000000.0 (excluding the endpoints).
     Label right_exponent, done;
     // Get exponent word.
     ldr(scratch, FieldMemOperand(source, HeapNumber::kExponentOffset));
     // Get exponent alone in scratch2.
@@ skipping 14 matching lines @@
     // for cmp because of the overflow flag, but we know the exponent is in the
     // range 0-2047 so there is no overflow.
     int fudge_factor = 0x400;
     sub(scratch2, scratch2, Operand(fudge_factor));
     cmp(scratch2, Operand(non_smi_exponent - fudge_factor));
     // If we have a match of the int32-but-not-Smi exponent then skip some
     // logic.
     b(eq, &right_exponent);
     // If the exponent is higher than that then go to slow case.  This catches
     // numbers that don't fit in a signed int32, infinities and NaNs.
-    b(gt, not_int32);
+    cmpgt(scratch2, Operand(non_smi_exponent - fudge_factor));
+    bt(not_int32);
 
     // We know the exponent is smaller than 30 (biased).  If it is less than
     // 0 (biased) then the number is smaller in magnitude than 1.0 * 2^0, i.e.
     // it rounds to zero.
     const uint32_t zero_exponent = HeapNumber::kExponentBias + 0;
-    sub(scratch2, scratch2, Operand(zero_exponent - fudge_factor), SetCC);
+    cmpge(scratch2, Operand(zero_exponent - fudge_factor));  // for branch below
+    sub(scratch2, scratch2, Operand(zero_exponent - fudge_factor));
     // Dest already has a Smi zero.
-    b(lt, &done);
+    bf(&done);
 
     // We have an exponent between 0 and 30 in scratch2.  Subtract from 30 to
     // get how much to shift down.
     rsb(dest, scratch2, Operand(30));
 
     bind(&right_exponent);
     // Get the top bits of the mantissa.
-    and_(scratch2, scratch, Operand(HeapNumber::kMantissaMask));
+    land(scratch2, scratch, Operand(HeapNumber::kMantissaMask));
     // Put back the implicit 1.
-    orr(scratch2, scratch2, Operand(1 << HeapNumber::kExponentShift));
+    lor(scratch2, scratch2, Operand(1 << HeapNumber::kExponentShift));
     // Shift up the mantissa bits to take up the space the exponent used to
     // take. We just orred in the implicit bit so that took care of one and
     // we want to leave the sign bit 0 so we subtract 2 bits from the shift
     // distance.
     const int shift_distance = HeapNumber::kNonMantissaBitsInTopWord - 2;
-    mov(scratch2, Operand(scratch2, LSL, shift_distance));
+    lsl(scratch2, scratch2, Operand(shift_distance));
     // Put sign in zero flag.
     tst(scratch, Operand(HeapNumber::kSignMask));
     // Get the second half of the double. For some exponents we don't
     // actually need this because the bits get shifted out again, but
     // it's probably slower to test than just to do it.
     ldr(scratch, FieldMemOperand(source, HeapNumber::kMantissaOffset));
     // Shift down 22 bits to get the last 10 bits.
-    orr(scratch, scratch2, Operand(scratch, LSR, 32 - shift_distance));
+    lsr(scratch, scratch, Operand(32 - shift_distance));
+    lor(scratch, scratch2, scratch);
     // Move down according to the exponent.
-    mov(dest, Operand(scratch, LSR, dest));
+    lsr(dest, scratch, dest);
     // Fix sign if sign bit was set.
-    rsb(dest, dest, Operand(0, RelocInfo::NONE), LeaveCC, ne);
+    rsb(dest, dest, Operand(0, RelocInfo::NONE), ne);
     bind(&done);
   }
 }
 
 
-void MacroAssembler::EmitVFPTruncate(VFPRoundingMode rounding_mode,
+void MacroAssembler::EmitFPUTruncate(FPURoundingMode rounding_mode,
                                      Register result,
                                      DwVfpRegister double_input,
                                      Register scratch,
-                                     DwVfpRegister double_scratch,
                                      CheckForInexactConversion check_inexact) {
-  ASSERT(!result.is(scratch));
-  ASSERT(!double_input.is(double_scratch));
+  ASSERT(rounding_mode == kRoundToZero);
+  int32_t check_inexact_conversion =
+    (check_inexact == kCheckForInexactConversion) ? kFPUInexactExceptionBit : 0;
 
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  CpuFeatures::Scope scope(VFP2);
-  Register prev_fpscr = result;
-  Label done;
+  idouble(result, double_input, scratch);
 
-  // Test for values that can be exactly represented as a signed 32-bit integer.
-  vcvt_s32_f64(double_scratch.low(), double_input);
-  vmov(result, double_scratch.low());
-  vcvt_f64_s32(double_scratch, double_scratch.low());
-  VFPCompareAndSetFlags(double_input, double_scratch);
-  b(eq, &done);
-
-  // Convert to integer, respecting rounding mode.
-  int32_t check_inexact_conversion =
-    (check_inexact == kCheckForInexactConversion) ? kVFPInexactExceptionBit : 0;
-
-  // Set custom FPCSR:
-  //  - Set rounding mode.
-  //  - Clear vfp cumulative exception flags.
-  //  - Make sure Flush-to-zero mode control bit is unset.
-  vmrs(prev_fpscr);
-  bic(scratch,
-      prev_fpscr,
-      Operand(kVFPExceptionMask |
-              check_inexact_conversion |
-              kVFPRoundingModeMask |
-              kVFPFlushToZeroMask));
-  // 'Round To Nearest' is encoded by 0b00 so no bits need to be set.
-  if (rounding_mode != kRoundToNearest) {
-    orr(scratch, scratch, Operand(rounding_mode));
-  }
-  vmsr(scratch);
-
-  // Convert the argument to an integer.
-  vcvt_s32_f64(double_scratch.low(),
-               double_input,
-               (rounding_mode == kRoundToZero) ? kDefaultRoundToZero
-                                               : kFPSCRRounding);
-
-  // Retrieve FPSCR.
-  vmrs(scratch);
-  // Restore FPSCR.
-  vmsr(prev_fpscr);
-  // Move the converted value into the result register.
-  vmov(result, double_scratch.low());
-  // Check for vfp exceptions.
-  tst(scratch, Operand(kVFPExceptionMask | check_inexact_conversion));
-
-  bind(&done);
+  // Check for FPU exceptions
+  tst(scratch, Operand(kFPUExceptionMask | check_inexact_conversion));
 }
 
 
 void MacroAssembler::EmitOutOfInt32RangeTruncate(Register result,
                                                  Register input_high,
                                                  Register input_low,
                                                  Register scratch) {
   Label done, normal_exponent, restore_sign;
 
   // Extract the biased exponent in result.
   Ubfx(result,
        input_high,
        HeapNumber::kExponentShift,
        HeapNumber::kExponentBits);
 
   // Check for Infinity and NaNs, which should return 0.
   cmp(result, Operand(HeapNumber::kExponentMask));
-  mov(result, Operand(0), LeaveCC, eq);
+  mov(result, Operand(0), eq);
   b(eq, &done);
 
   // Express exponent as delta to (number of mantissa bits + 31).
   sub(result,
       result,
-      Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits + 31),
-      SetCC);
+      Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits + 31));
+  cmpgt(result, Operand(0));
 
   // If the delta is strictly positive, all bits would be shifted away,
   // which means that we can return 0.
-  b(le, &normal_exponent);
+  b(f, &normal_exponent);
   mov(result, Operand(0));
   b(&done);
 
   bind(&normal_exponent);
   const int kShiftBase = HeapNumber::kNonMantissaBitsInTopWord - 1;
   // Calculate shift.
-  add(scratch, result, Operand(kShiftBase + HeapNumber::kMantissaBits), SetCC);
+  add(scratch, result, Operand(kShiftBase + HeapNumber::kMantissaBits));
 
   // Save the sign.
   Register sign = result;
   result = no_reg;
-  and_(sign, input_high, Operand(HeapNumber::kSignMask));
+  land(sign, input_high, Operand(HeapNumber::kSignMask));
 
   // Set the implicit 1 before the mantissa part in input_high.
   orr(input_high,
       input_high,
       Operand(1 << HeapNumber::kMantissaBitsInTopWord));
   // Shift the mantissa bits to the correct position.
   // We don't need to clear non-mantissa bits as they will be shifted away.
   // If they weren't, it would mean that the answer is in the 32bit range.
-  mov(input_high, Operand(input_high, LSL, scratch));
+  lsl(input_high, input_high, scratch);
 
   // Replace the shifted bits with bits from the lower mantissa word.
   Label pos_shift, shift_done;
-  rsb(scratch, scratch, Operand(32), SetCC);
-  b(&pos_shift, ge);
+  rsb(scratch, scratch, Operand(32));
+  cmpge(scratch, Operand(0));
+  bt(&pos_shift);
 
   // Negate scratch.
   rsb(scratch, scratch, Operand(0));
-  mov(input_low, Operand(input_low, LSL, scratch));
+  lsl(input_low, input_low, scratch);
   b(&shift_done);
 
   bind(&pos_shift);
-  mov(input_low, Operand(input_low, LSR, scratch));
+  lsr(input_low, input_low, scratch);
 
   bind(&shift_done);
-  orr(input_high, input_high, Operand(input_low));
+  orr(input_high, input_high, input_low);
   // Restore sign if necessary.
   cmp(sign, Operand(0));
   result = sign;
   sign = no_reg;
-  rsb(result, input_high, Operand(0), LeaveCC, ne);
-  mov(result, input_high, LeaveCC, eq);
+  rsb(result, input_high, Operand(0));
+  mov(result, input_high, eq);
   bind(&done);
 }
 
 
 void MacroAssembler::EmitECMATruncate(Register result,
                                       DwVfpRegister double_input,
                                       SwVfpRegister single_scratch,
                                       Register scratch,
                                       Register input_high,
                                       Register input_low) {
-  CpuFeatures::Scope scope(VFP2);
+  ASSERT(CpuFeatures::IsSupported(FPU));
   ASSERT(!input_high.is(result));
   ASSERT(!input_low.is(result));
   ASSERT(!input_low.is(input_high));
   ASSERT(!scratch.is(result) &&
          !scratch.is(input_high) &&
          !scratch.is(input_low));
   ASSERT(!single_scratch.is(double_input.low()) &&
          !single_scratch.is(double_input.high()));
 
   Label done;
 
-  // Clear cumulative exception flags.
-  ClearFPSCRBits(kVFPExceptionMask, scratch);
-  // Try a conversion to a signed integer.
-  vcvt_s32_f64(single_scratch, double_input);
-  vmov(result, single_scratch);
-  // Retrieve he FPSCR.
-  vmrs(scratch);
+  // Do the conversion
+  idouble(result, double_input);
+  // Retrieve the FPSCR.
+  str_fpscr(scratch);
   // Check for overflow and NaNs.
-  tst(scratch, Operand(kVFPOverflowExceptionBit |
-                       kVFPUnderflowExceptionBit |
-                       kVFPInvalidOpExceptionBit));
+  tst(scratch, Operand(kFPUOverflowExceptionBit |
+                       kFPUUnderflowExceptionBit |
+                       kFPUInvalidExceptionBit |
+                       kFPUInexactExceptionBit));
   // If we had no exceptions we are done.
   b(eq, &done);
 
   // Load the double value and perform a manual truncation.
-  vmov(input_low, input_high, double_input);
+  movd(input_low, input_high, double_input);
   EmitOutOfInt32RangeTruncate(result,
                               input_high,
                               input_low,
                               scratch);
   bind(&done);
 }
 
 
 void MacroAssembler::GetLeastBitsFromSmi(Register dst,
                                          Register src,
                                          int num_least_bits) {
-  if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size()) {
-    ubfx(dst, src, kSmiTagSize, num_least_bits);
-  } else {
-    mov(dst, Operand(src, ASR, kSmiTagSize));
-    and_(dst, dst, Operand((1 << num_least_bits) - 1));
-  }
+  Ubfx(dst, src, kSmiTagSize, num_least_bits);
 }
 
 
 void MacroAssembler::GetLeastBitsFromInt32(Register dst,
                                            Register src,
                                            int num_least_bits) {
-  and_(dst, src, Operand((1 << num_least_bits) - 1));
+  ASSERT(!dst.is(sh4_rtmp) && !src.is(sh4_rtmp));
+  land(dst, src, Operand((1 << num_least_bits) - 1));
 }
 
 
 void MacroAssembler::CallRuntime(const Runtime::Function* f,
                                  int num_arguments) {
+  // No register conventions on entry.
   // All parameters are on the stack.  r0 has the return value after call.
+#ifdef DEBUG
+  // Clobber parameter registers on entry.
+  Dead(r0, r1, r2, r3);
+  Dead(r4, r5, r6, r7);
+#endif
 
   // If the expected number of arguments of the runtime function is
   // constant, we check that the actual number of arguments match the
   // expectation.
+  RECORD_LINE();
   if (f->nargs >= 0 && f->nargs != num_arguments) {
     IllegalOperation(num_arguments);
     return;
   }
 
   // TODO(1236192): Most runtime routines don't need the number of
   // arguments passed in because it is constant. At some point we
   // should remove this need and make the runtime routine entry code
   // smarter.
   mov(r0, Operand(num_arguments));
   mov(r1, Operand(ExternalReference(f, isolate())));
   CEntryStub stub(1);
   CallStub(&stub);
 }
 
 
 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) {
+  RECORD_LINE();
   CallRuntime(Runtime::FunctionForId(fid), num_arguments);
 }
 
 
-void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) {
-  const Runtime::Function* function = Runtime::FunctionForId(id);
-  mov(r0, Operand(function->nargs));
-  mov(r1, Operand(ExternalReference(function, isolate())));
-  CEntryStub stub(1, kSaveFPRegs);
-  CallStub(&stub);
-}
-
-
 void MacroAssembler::CallExternalReference(const ExternalReference& ext,
                                            int num_arguments) {
   mov(r0, Operand(num_arguments));
   mov(r1, Operand(ext));
 
   CEntryStub stub(1);
   CallStub(&stub);
 }
 
 
 void MacroAssembler::TailCallExternalReference(const ExternalReference& ext,
                                                int num_arguments,
                                                int result_size) {
   // TODO(1236192): Most runtime routines don't need the number of
   // arguments passed in because it is constant. At some point we
   // should remove this need and make the runtime routine entry code
   // smarter.
+  RECORD_LINE();
   mov(r0, Operand(num_arguments));
   JumpToExternalReference(ext);
 }
 
 
 void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid,
                                      int num_arguments,
                                      int result_size) {
+  RECORD_LINE();
   TailCallExternalReference(ExternalReference(fid, isolate()),
                             num_arguments,
                             result_size);
 }
 
 
 void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin) {
-#if defined(__thumb__)
-  // Thumb mode builtin.
-  ASSERT((reinterpret_cast<intptr_t>(builtin.address()) & 1) == 1);
-#endif
+  RECORD_LINE();
   mov(r1, Operand(builtin));
   CEntryStub stub(1);
-  Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
+  RECORD_LINE();
+  jmp(stub.GetCode(), RelocInfo::CODE_TARGET);
 }
 
 
 void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,
                                    InvokeFlag flag,
                                    const CallWrapper& call_wrapper) {
   // You can't call a builtin without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
+  // No register conventions on entry.
+  // All parameters are on stack.
+  // Return value in r0 after call.
+#ifdef DEBUG
+  // Clobber parameter registers on entry.
+  Dead(r0, r1, r2, r3);
+  Dead(r4, r5, r6, r7);
+#endif
+
+  RECORD_LINE();
   GetBuiltinEntry(r2, id);
   if (flag == CALL_FUNCTION) {
-    call_wrapper.BeforeCall(CallSize(r2));
+    RECORD_LINE();
+    call_wrapper.BeforeCall(2 * kInstrSize);
     SetCallKind(r5, CALL_AS_METHOD);
-    Call(r2);
+    jsr(r2);
     call_wrapper.AfterCall();
   } else {
     ASSERT(flag == JUMP_FUNCTION);
+    RECORD_LINE();
     SetCallKind(r5, CALL_AS_METHOD);
-    Jump(r2);
+    jmp(r2);
   }
 }
 
 
 void MacroAssembler::GetBuiltinFunction(Register target,
                                         Builtins::JavaScript id) {
+  ASSERT(!target.is(sh4_ip));
+  ASSERT(!target.is(sh4_rtmp));
+  RECORD_LINE();
   // Load the builtins object into target register.
   ldr(target,
       MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
   ldr(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
   // Load the JavaScript builtin function from the builtins object.
   ldr(target, FieldMemOperand(target,
                           JSBuiltinsObject::OffsetOfFunctionWithId(id)));
 }
 
 
 void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {
+  // FIXME(stm): why r1 ??
   ASSERT(!target.is(r1));
+  ASSERT(!target.is(sh4_rtmp));
+  ASSERT(!target.is(sh4_ip));
+  RECORD_LINE();
   GetBuiltinFunction(r1, id);
+  RECORD_LINE();
   // Load the code entry point from the builtins object.
   ldr(target, FieldMemOperand(r1, JSFunction::kCodeEntryOffset));
 }
 
 
 void MacroAssembler::SetCounter(StatsCounter* counter, int value,
                                 Register scratch1, Register scratch2) {
+  RECORD_LINE();
+  ASSERT(!scratch1.is(scratch2));
+  ASSERT(!scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+  ASSERT(!scratch1.is(sh4_ip) && !scratch2.is(sh4_ip));
   if (FLAG_native_code_counters && counter->Enabled()) {
+    RECORD_LINE();
     mov(scratch1, Operand(value));
     mov(scratch2, Operand(ExternalReference(counter)));
     str(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   ASSERT(value > 0);
+  ASSERT(!scratch1.is(scratch2));
+  ASSERT(!scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+  ASSERT(!scratch1.is(sh4_ip) && !scratch2.is(sh4_ip));
+  RECORD_LINE();
   if (FLAG_native_code_counters && counter->Enabled()) {
+    RECORD_LINE();
     mov(scratch2, Operand(ExternalReference(counter)));
     ldr(scratch1, MemOperand(scratch2));
     add(scratch1, scratch1, Operand(value));
     str(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
                                       Register scratch1, Register scratch2) {
   ASSERT(value > 0);
+  ASSERT(!scratch1.is(scratch2));
+  ASSERT(!scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+  ASSERT(!scratch1.is(sh4_ip) && !scratch2.is(sh4_ip));
+
+  RECORD_LINE();
   if (FLAG_native_code_counters && counter->Enabled()) {
+    RECORD_LINE();
     mov(scratch2, Operand(ExternalReference(counter)));
     ldr(scratch1, MemOperand(scratch2));
     sub(scratch1, scratch1, Operand(value));
     str(scratch1, MemOperand(scratch2));
   }
 }
 
 
 void MacroAssembler::Assert(Condition cond, const char* msg) {
   if (emit_debug_code())
     Check(cond, msg);
 }
 
 
-void MacroAssembler::AssertRegisterIsRoot(Register reg,
+void MacroAssembler::AssertRegisterIsRoot(Register reg, Register scratch,
                                           Heap::RootListIndex index) {
+  // TODO(STM): scratch need or ip ok ?
+  ASSERT(!reg.is(scratch));
   if (emit_debug_code()) {
-    LoadRoot(ip, index);
-    cmp(reg, ip);
+    LoadRoot(scratch, index);
+    cmp(reg, scratch);
     Check(eq, "Register did not match expected root");
   }
 }
 
 
 void MacroAssembler::AssertFastElements(Register elements) {
+  RECORD_LINE();
   if (emit_debug_code()) {
-    ASSERT(!elements.is(ip));
+    ASSERT(!elements.is(sh4_rtmp));
+    ASSERT(!elements.is(sh4_ip));
     Label ok;
+    RECORD_LINE();
     push(elements);
     ldr(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
     LoadRoot(ip, Heap::kFixedArrayMapRootIndex);
     cmp(elements, ip);
     b(eq, &ok);
+    RECORD_LINE();
     LoadRoot(ip, Heap::kFixedDoubleArrayMapRootIndex);
     cmp(elements, ip);
     b(eq, &ok);
+    RECORD_LINE();
     LoadRoot(ip, Heap::kFixedCOWArrayMapRootIndex);
     cmp(elements, ip);
     b(eq, &ok);
+    RECORD_LINE();
     Abort("JSObject with fast elements map has slow elements");
     bind(&ok);
+    RECORD_LINE();
     pop(elements);
   }
 }
 
 
 void MacroAssembler::Check(Condition cond, const char* msg) {
   Label L;
+  RECORD_LINE();
   b(cond, &L);
   Abort(msg);
   // will not return here
   bind(&L);
 }
 
+void MacroAssembler::DebugPrint(Register obj) {
+  RECORD_LINE();
+  push(obj);
+  CallRuntime(Runtime::kDebugPrint, 1);
+}
 
 void MacroAssembler::Abort(const char* msg) {
   Label abort_start;
   bind(&abort_start);
+  RECORD_LINE();
   // We want to pass the msg string like a smi to avoid GC
   // problems, however msg is not guaranteed to be aligned
   // properly. Instead, we pass an aligned pointer that is
   // a proper v8 smi, but also pass the alignment difference
   // from the real pointer as a smi.
   intptr_t p1 = reinterpret_cast<intptr_t>(msg);
   intptr_t p0 = (p1 & ~kSmiTagMask) + kSmiTag;
   ASSERT(reinterpret_cast<Object*>(p0)->IsSmi());
 #ifdef DEBUG
   if (msg != NULL) {
     RecordComment("Abort message: ");
     RecordComment(msg);
   }
 #endif
-
   mov(r0, Operand(p0));
   push(r0);
   mov(r0, Operand(Smi::FromInt(p1 - p0)));
   push(r0);
   // Disable stub call restrictions to always allow calls to abort.
   if (!has_frame_) {
     // We don't actually want to generate a pile of code for this, so just
     // claim there is a stack frame, without generating one.
     FrameScope scope(this, StackFrame::NONE);
     CallRuntime(Runtime::kAbort, 2);
   } else {
     CallRuntime(Runtime::kAbort, 2);
   }
   // will not return here
-  if (is_const_pool_blocked()) {
-    // If the calling code cares about the exact number of
-    // instructions generated, we insert padding here to keep the size
-    // of the Abort macro constant.
-    static const int kExpectedAbortInstructions = 10;
-    int abort_instructions = InstructionsGeneratedSince(&abort_start);
-    ASSERT(abort_instructions <= kExpectedAbortInstructions);
-    while (abort_instructions++ < kExpectedAbortInstructions) {
-      nop();
-    }
-  }
+  // TODO(STM): implement this when const pool manager is active
+  // if (is_const_pool_blocked()) {
+  // }
 }
 
 
+// Clobbers: sh4_rtmp, dst
+// live-in: cp
+// live-out: cp, dst
 void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
+  ASSERT(!dst.is(sh4_rtmp));
+  RECORD_LINE();
   if (context_chain_length > 0) {
+    RECORD_LINE();
     // Move up the chain of contexts to the context containing the slot.
     ldr(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     for (int i = 1; i < context_chain_length; i++) {
+      RECORD_LINE();
       ldr(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
     }
   } else {
+    RECORD_LINE();
     // Slot is in the current function context.  Move it into the
     // destination register in case we store into it (the write barrier
     // cannot be allowed to destroy the context in esi).
     mov(dst, cp);
   }
 }
 
 
 void MacroAssembler::LoadTransitionedArrayMapConditional(
     ElementsKind expected_kind,
@@ skipping 56 matching lines @@
   ldr(function, FieldMemOperand(function,
                                 GlobalObject::kNativeContextOffset));
   // Load the function from the native context.
   ldr(function, MemOperand(function, Context::SlotOffset(index)));
 }
 
 
 void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
                                                   Register map,
                                                   Register scratch) {
+  ASSERT(!scratch.is(sh4_ip));
+  ASSERT(!scratch.is(sh4_rtmp));
   // Load the initial map. The global functions all have initial maps.
   ldr(map, FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
   if (emit_debug_code()) {
-    Label ok, fail;
+    Label ok;
+    Label fail;
     CheckMap(map, scratch, Heap::kMetaMapRootIndex, &fail, DO_SMI_CHECK);
-    b(&ok);
+    b_near(&ok);
     bind(&fail);
     Abort("Global functions must have initial map");
     bind(&ok);
   }
 }
 
 
 void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
     Register reg,
     Register scratch,
     Label* not_power_of_two_or_zero) {
-  sub(scratch, reg, Operand(1), SetCC);
-  b(mi, not_power_of_two_or_zero);
+  ASSERT(!reg.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+  RECORD_LINE();
+  // Note: actually the case 0x80000000 is considered a power of two
+  // (not a neg value)
+  sub(scratch, reg, Operand(1));
+  cmpge(scratch, Operand(0));
+  bf(not_power_of_two_or_zero);
   tst(scratch, reg);
   b(ne, not_power_of_two_or_zero);
 }
 
 
 void MacroAssembler::JumpIfNotPowerOfTwoOrZeroAndNeg(
     Register reg,
     Register scratch,
     Label* zero_and_neg,
     Label* not_power_of_two) {
-  sub(scratch, reg, Operand(1), SetCC);
-  b(mi, zero_and_neg);
+  ASSERT(!reg.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+  RECORD_LINE();
+  // Note: actually the case 0x80000000 is considered a pozer of two
+  // (not a neg value)
+  sub(scratch, reg, Operand(1));
+  cmpge(scratch, Operand(0));
+  bf(zero_and_neg);
   tst(scratch, reg);
   b(ne, not_power_of_two);
 }
 
 
 void MacroAssembler::JumpIfNotBothSmi(Register reg1,
                                       Register reg2,
-                                      Label* on_not_both_smi) {
+                                      Label* on_not_both_smi,
+                                      Label::Distance distance) {
+  ASSERT(!reg1.is(sh4_rtmp) && !reg2.is(sh4_rtmp));
   STATIC_ASSERT(kSmiTag == 0);
+  RECORD_LINE();
   tst(reg1, Operand(kSmiTagMask));
-  tst(reg2, Operand(kSmiTagMask), eq);
-  b(ne, on_not_both_smi);
+  b(ne, on_not_both_smi, distance);
+  tst(reg2, Operand(kSmiTagMask));
+  b(ne, on_not_both_smi, distance);
 }
 
 
 void MacroAssembler::UntagAndJumpIfSmi(
     Register dst, Register src, Label* smi_case) {
   STATIC_ASSERT(kSmiTag == 0);
-  mov(dst, Operand(src, ASR, kSmiTagSize), SetCC);
-  b(cc, smi_case);  // Shifter carry is not set for a smi.
-}
-
-
-void MacroAssembler::UntagAndJumpIfNotSmi(
-    Register dst, Register src, Label* non_smi_case) {
-  STATIC_ASSERT(kSmiTag == 0);
-  mov(dst, Operand(src, ASR, kSmiTagSize), SetCC);
-  b(cs, non_smi_case);  // Shifter carry is set for a non-smi.
+  tst(src, Operand(kSmiTagMask));
+  asr(dst, src, Operand(kSmiTagSize));
+  bt(smi_case);
 }
 
 
 void MacroAssembler::JumpIfEitherSmi(Register reg1,
                                      Register reg2,
-                                     Label* on_either_smi) {
+                                     Label* on_either_smi,
+                                     Label::Distance distance) {
+  ASSERT(!reg1.is(sh4_rtmp) && !reg2.is(sh4_rtmp));
   STATIC_ASSERT(kSmiTag == 0);
+  RECORD_LINE();
   tst(reg1, Operand(kSmiTagMask));
-  tst(reg2, Operand(kSmiTagMask), ne);
-  b(eq, on_either_smi);
+  b(eq, on_either_smi, distance);
+  tst(reg2, Operand(kSmiTagMask));
+  b(eq, on_either_smi, distance);
 }
 
 
-void MacroAssembler::AssertNotSmi(Register object) {
-  if (emit_debug_code()) {
-    STATIC_ASSERT(kSmiTag == 0);
-    tst(object, Operand(kSmiTagMask));
-    Check(ne, "Operand is a smi");
-  }
+void MacroAssembler::AbortIfSmi(Register object) {
+  STATIC_ASSERT(kSmiTag == 0);
+  ASSERT(!object.is(sh4_rtmp));
+
+  tst(object, Operand(kSmiTagMask));
+  Assert(ne, "Operand is a smi");
 }
 
 
-void MacroAssembler::AssertSmi(Register object) {
-  if (emit_debug_code()) {
-    STATIC_ASSERT(kSmiTag == 0);
-    tst(object, Operand(kSmiTagMask));
-    Check(eq, "Operand is not smi");
-  }
+void MacroAssembler::AbortIfNotSmi(Register object) {
+  STATIC_ASSERT(kSmiTag == 0);
+  ASSERT(!object.is(sh4_rtmp));
+
+  tst(object, Operand(kSmiTagMask));
+  Assert(eq, "Operand is not smi");
 }
 
 
-void MacroAssembler::AssertString(Register object) {
-  if (emit_debug_code()) {
-    STATIC_ASSERT(kSmiTag == 0);
-    tst(object, Operand(kSmiTagMask));
-    Check(ne, "Operand is a smi and not a string");
-    push(object);
-    ldr(object, FieldMemOperand(object, HeapObject::kMapOffset));
-    CompareInstanceType(object, object, FIRST_NONSTRING_TYPE);
-    pop(object);
-    Check(lo, "Operand is not a string");
-  }
+void MacroAssembler::AbortIfNotString(Register object) {
+  STATIC_ASSERT(kSmiTag == 0);
+  ASSERT(!object.is(sh4_ip));
+  ASSERT(!object.is(sh4_rtmp));
+
+  tst(object, Operand(kSmiTagMask));
+  Assert(ne, "Operand is not a string");
+  RECORD_LINE();
+  push(object);
+  ldr(object, FieldMemOperand(object, HeapObject::kMapOffset));
+  CompareInstanceType(object, object, FIRST_NONSTRING_TYPE, hs);
+  pop(object);
+  Assert(ne, "Operand is not a string");
 }
 
 
-
-void MacroAssembler::AssertRootValue(Register src,
-                                     Heap::RootListIndex root_value_index,
-                                     const char* message) {
-  if (emit_debug_code()) {
-    CompareRoot(src, root_value_index);
-    Check(eq, message);
-  }
+void MacroAssembler::AbortIfNotRootValue(Register src,
+                                         Heap::RootListIndex root_value_index,
+                                         const char* message) {
+  ASSERT(!src.is(sh4_ip));
+  ASSERT(!src.is(sh4_rtmp));
+  CompareRoot(src, root_value_index);
+  Assert(eq, message);
 }
 
 
+void MacroAssembler::PrintRegisterValue(Register reg) {
+  ASSERT(!reg.is(r4) && !reg.is(r5) && !reg.is(r6) && !reg.is(r7));
+  ASSERT(!reg.is(sh4_rtmp));
+  Label gc_required, skip, not_smi;
+  RECORD_LINE();
+  EnterInternalFrame();
+  // Save reg as it is scratched by WriteInt32ToHeapNumberStub()
+  push(reg);
+  pushm(kJSCallerSaved);
+  TrySmiTag(reg, &not_smi, r5/*scratch*/);
+  mov(r4, reg);
+  jmp(&skip);
+  bind(&not_smi);
+  RECORD_LINE();
+  LoadRoot(r7, Heap::kHeapNumberMapRootIndex);
+  AllocateHeapNumber(r4/*result heap number*/, r5/*scratch*/, r6/*scratch*/,
+                     r7/*heap_number_map*/, &gc_required);
+  WriteInt32ToHeapNumberStub stub(reg, r4, r5/*scratch*/);
+  CallStub(&stub);
+  jmp(&skip);
+  bind(&gc_required);
+  RECORD_LINE();
+  Abort("GC required while dumping number");
+  bind(&skip);
+  RECORD_LINE();
+  push(r4);
+  CallRuntime(Runtime::kNumberToString, 1);
+  push(r0);
+  CallRuntime(Runtime::kGlobalPrint, 1);
+  popm(kJSCallerSaved);
+  pop(reg);
+  LeaveInternalFrame();
+}
+
+
 void MacroAssembler::JumpIfNotHeapNumber(Register object,
                                          Register heap_number_map,
                                          Register scratch,
                                          Label* on_not_heap_number) {
+  RECORD_LINE();
+  ASSERT(!scratch.is(sh4_ip));
+  ASSERT(!scratch.is(sh4_rtmp));
+  AssertRegisterIsRoot(heap_number_map, scratch, Heap::kHeapNumberMapRootIndex);
   ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
-  AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   cmp(scratch, heap_number_map);
   b(ne, on_not_heap_number);
 }
 
 
 void MacroAssembler::JumpIfNonSmisNotBothSequentialAsciiStrings(
     Register first,
     Register second,
     Register scratch1,
     Register scratch2,
     Label* failure) {
+
+  ASSERT(!first.is(sh4_ip) && !second.is(sh4_ip) && !scratch1.is(sh4_ip) &&
+         !scratch2.is(sh4_ip));
+  ASSERT(!first.is(sh4_rtmp) && !second.is(sh4_rtmp) &&
+         !scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+  RECORD_LINE();
   // Test that both first and second are sequential ASCII strings.
   // Assume that they are non-smis.
   ldr(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
   ldr(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
   ldrb(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
   ldrb(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
 
   JumpIfBothInstanceTypesAreNotSequentialAscii(scratch1,
                                                scratch2,
                                                scratch1,
                                                scratch2,
                                                failure);
 }
 
+
 void MacroAssembler::JumpIfNotBothSequentialAsciiStrings(Register first,
                                                          Register second,
                                                          Register scratch1,
                                                          Register scratch2,
                                                          Label* failure) {
+  ASSERT(!first.is(sh4_ip) && !second.is(sh4_ip) && !scratch1.is(sh4_ip) &&
+         !scratch2.is(sh4_ip));
+  ASSERT(!first.is(sh4_rtmp) && !second.is(sh4_rtmp) &&
+         !scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+  RECORD_LINE();
   // Check that neither is a smi.
   STATIC_ASSERT(kSmiTag == 0);
-  and_(scratch1, first, Operand(second));
+  land(scratch1, first, second);
   JumpIfSmi(scratch1, failure);
   JumpIfNonSmisNotBothSequentialAsciiStrings(first,
                                              second,
                                              scratch1,
                                              scratch2,
                                              failure);
 }
 
 
 // Allocates a heap number or jumps to the need_gc label if the young space
 // is full and a scavenge is needed.
 void MacroAssembler::AllocateHeapNumber(Register result,
                                         Register scratch1,
                                         Register scratch2,
                                         Register heap_number_map,
-                                        Label* gc_required,
-                                        TaggingMode tagging_mode) {
+                                        Label* gc_required) {
   // Allocate an object in the heap for the heap number and tag it as a heap
   // object.
+  RECORD_LINE();
   AllocateInNewSpace(HeapNumber::kSize,
                      result,
                      scratch1,
                      scratch2,
                      gc_required,
-                     tagging_mode == TAG_RESULT ? TAG_OBJECT :
-                                                  NO_ALLOCATION_FLAGS);
+                     TAG_OBJECT);
 
   // Store heap number map in the allocated object.
-  AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
-  if (tagging_mode == TAG_RESULT) {
-    str(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
-  } else {
-    str(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
-  }
+  RECORD_LINE();
+  AssertRegisterIsRoot(heap_number_map, scratch1,
+                       Heap::kHeapNumberMapRootIndex);
+  RECORD_LINE();
+  str(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
 }
 
 
-void MacroAssembler::AllocateHeapNumberWithValue(Register result,
-                                                 DwVfpRegister value,
-                                                 Register scratch1,
-                                                 Register scratch2,
-                                                 Register heap_number_map,
-                                                 Label* gc_required) {
-  AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required);
-  sub(scratch1, result, Operand(kHeapObjectTag));
-  vstr(value, scratch1, HeapNumber::kValueOffset);
-}
-
-
 // Copies a fixed number of fields of heap objects from src to dst.
 void MacroAssembler::CopyFields(Register dst,
                                 Register src,
                                 RegList temps,
                                 int field_count) {
   // At least one bit set in the first 15 registers.
   ASSERT((temps & ((1 << 15) - 1)) != 0);
   ASSERT((temps & dst.bit()) == 0);
   ASSERT((temps & src.bit()) == 0);
   // Primitive implementation using only one temporary register.
 
   Register tmp = no_reg;
   // Find a temp register in temps list.
   for (int i = 0; i < 15; i++) {
     if ((temps & (1 << i)) != 0) {
       tmp.set_code(i);
       break;
     }
   }
   ASSERT(!tmp.is(no_reg));
-
+  RECORD_LINE();
   for (int i = 0; i < field_count; i++) {
+    RECORD_LINE();
     ldr(tmp, FieldMemOperand(src, i * kPointerSize));
     str(tmp, FieldMemOperand(dst, i * kPointerSize));
   }
 }
 
 
 void MacroAssembler::CopyBytes(Register src,
                                Register dst,
                                Register length,
                                Register scratch) {
   Label align_loop, align_loop_1, word_loop, byte_loop, byte_loop_1, done;
 
   // Align src before copying in word size chunks.
   bind(&align_loop);
   cmp(length, Operand(0));
-  b(eq, &done);
+  b(eq, &done, Label::kNear);
   bind(&align_loop_1);
   tst(src, Operand(kPointerSize - 1));
-  b(eq, &word_loop);
-  ldrb(scratch, MemOperand(src, 1, PostIndex));
-  strb(scratch, MemOperand(dst, 1, PostIndex));
-  sub(length, length, Operand(1), SetCC);
-  b(ne, &byte_loop_1);
+  b(eq, &word_loop, Label::kNear);
+  ldrb(scratch, MemOperand(src));
+  add(src, src, Operand(1));
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+  dt(length);
+  b(ne, &byte_loop_1, Label::kNear);
 
   // Copy bytes in word size chunks.
   bind(&word_loop);
   if (emit_debug_code()) {
     tst(src, Operand(kPointerSize - 1));
     Assert(eq, "Expecting alignment for CopyBytes");
   }
-  cmp(length, Operand(kPointerSize));
-  b(lt, &byte_loop);
-  ldr(scratch, MemOperand(src, kPointerSize, PostIndex));
-  if (CpuFeatures::IsSupported(UNALIGNED_ACCESSES)) {
-    str(scratch, MemOperand(dst, kPointerSize, PostIndex));
-  } else {
-    strb(scratch, MemOperand(dst, 1, PostIndex));
-    mov(scratch, Operand(scratch, LSR, 8));
-    strb(scratch, MemOperand(dst, 1, PostIndex));
-    mov(scratch, Operand(scratch, LSR, 8));
-    strb(scratch, MemOperand(dst, 1, PostIndex));
-    mov(scratch, Operand(scratch, LSR, 8));
-    strb(scratch, MemOperand(dst, 1, PostIndex));
-  }
+  cmpge(length, Operand(kPointerSize));
+  bf_near(&byte_loop);
+  ldr(scratch, MemOperand(src));
+  add(src, src, Operand(kPointerSize));
+#if CAN_USE_UNALIGNED_ACCESSES
+  str(scratch, MemOperand(dst));
+  add(dst, dst, Operand(kPointerSize));
+#else
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+  lsr(scratch, scratch, Operand(8));
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+  lsr(scratch, scratch, Operand(8));
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+  lsr(scratch, scratch, Operand(8));
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+#endif
   sub(length, length, Operand(kPointerSize));
-  b(&word_loop);
+  b_near(&word_loop);
 
   // Copy the last bytes if any left.
   bind(&byte_loop);
   cmp(length, Operand(0));
-  b(eq, &done);
+  b(eq, &done, Label::kNear);
   bind(&byte_loop_1);
-  ldrb(scratch, MemOperand(src, 1, PostIndex));
-  strb(scratch, MemOperand(dst, 1, PostIndex));
-  sub(length, length, Operand(1), SetCC);
-  b(ne, &byte_loop_1);
+  ldrb(scratch, MemOperand(src));
+  add(src, src, Operand(1));
+  strb(scratch, MemOperand(dst));
+  add(dst, dst, Operand(1));
+  dt(length);
+  b(ne, &byte_loop_1, Label::kNear);
   bind(&done);
 }
 
 
 void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
                                                 Register end_offset,
                                                 Register filler) {
   Label loop, entry;
-  b(&entry);
+  jmp(&entry);
   bind(&loop);
   str(filler, MemOperand(start_offset, kPointerSize, PostIndex));
   bind(&entry);
-  cmp(start_offset, end_offset);
-  b(lt, &loop);
+  cmpge(start_offset, end_offset);
+  bf(&loop);
 }
 
 
 void MacroAssembler::CountLeadingZeros(Register zeros,   // Answer.
                                        Register source,  // Input.
                                        Register scratch) {
   ASSERT(!zeros.is(source) || !source.is(scratch));
   ASSERT(!zeros.is(scratch));
-  ASSERT(!scratch.is(ip));
-  ASSERT(!source.is(ip));
-  ASSERT(!zeros.is(ip));
-#ifdef CAN_USE_ARMV5_INSTRUCTIONS
-  clz(zeros, source);  // This instruction is only supported after ARM5.
-#else
-  // Order of the next two lines is important: zeros register
-  // can be the same as source register.
-  Move(scratch, source);
-  mov(zeros, Operand(0, RelocInfo::NONE));
+  ASSERT(!scratch.is(sh4_rtmp));
+  ASSERT(!source.is(sh4_rtmp));
+  ASSERT(!zeros.is(sh4_rtmp));
+  ASSERT(!scratch.is(sh4_ip));
+  ASSERT(!source.is(sh4_ip));
+  ASSERT(!zeros.is(sh4_ip));
+  RECORD_LINE();
+
+  Label l0, l1, l2, l3, l4, l5;
+  cmpeq(source, Operand(0));
+  bf_near(&l0);
+  mov(zeros, Operand(32));
+  jmp_near(&l5);
+
+  bind(&l0);
+  // Be carefull to save source in scratch, source and zeros may be the same
+  // register
+  mov(scratch, source);
+  mov(zeros, Operand(0));
   // Top 16.
   tst(scratch, Operand(0xffff0000));
-  add(zeros, zeros, Operand(16), LeaveCC, eq);
-  mov(scratch, Operand(scratch, LSL, 16), LeaveCC, eq);
+  bf_near(&l1);
+  add(zeros, zeros, Operand(16));
+  lsl(scratch, scratch, Operand(16));
   // Top 8.
+  bind(&l1);
   tst(scratch, Operand(0xff000000));
-  add(zeros, zeros, Operand(8), LeaveCC, eq);
-  mov(scratch, Operand(scratch, LSL, 8), LeaveCC, eq);
+  bf_near(&l2);
+  add(zeros, zeros, Operand(8));
+  lsl(scratch, scratch, Operand(8));
   // Top 4.
+  bind(&l2);
   tst(scratch, Operand(0xf0000000));
-  add(zeros, zeros, Operand(4), LeaveCC, eq);
-  mov(scratch, Operand(scratch, LSL, 4), LeaveCC, eq);
+  bf_near(&l3);
+  add(zeros, zeros, Operand(4));
+  lsl(scratch, scratch, Operand(4));
   // Top 2.
+  bind(&l3);
   tst(scratch, Operand(0xc0000000));
-  add(zeros, zeros, Operand(2), LeaveCC, eq);
-  mov(scratch, Operand(scratch, LSL, 2), LeaveCC, eq);
+  bf_near(&l4);
+  add(zeros, zeros, Operand(2));
+  lsl(scratch, scratch, Operand(2));
   // Top bit.
+  bind(&l4);
   tst(scratch, Operand(0x80000000u));
-  add(zeros, zeros, Operand(1), LeaveCC, eq);
-#endif
+  bf_near(&l5);
+  add(zeros, zeros, Operand(1));
+  bind(&l5);
 }
 
 
 void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialAscii(
     Register first,
     Register second,
     Register scratch1,
     Register scratch2,
     Label* failure) {
+  ASSERT(!first.is(sh4_ip) && !second.is(sh4_ip) && !scratch1.is(sh4_ip) &&
+         !scratch2.is(sh4_ip));
+  ASSERT(!first.is(sh4_rtmp) && !second.is(sh4_rtmp) &&
+         !scratch1.is(sh4_rtmp) && !scratch2.is(sh4_rtmp));
+
   int kFlatAsciiStringMask =
       kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
   int kFlatAsciiStringTag = ASCII_STRING_TYPE;
-  and_(scratch1, first, Operand(kFlatAsciiStringMask));
-  and_(scratch2, second, Operand(kFlatAsciiStringMask));
+  RECORD_LINE();
+  land(scratch1, first, Operand(kFlatAsciiStringMask));
+  land(scratch2, second, Operand(kFlatAsciiStringMask));
   cmp(scratch1, Operand(kFlatAsciiStringTag));
   // Ignore second test if first test failed.
-  cmp(scratch2, Operand(kFlatAsciiStringTag), eq);
+  b(ne, failure);
+  RECORD_LINE();
+  cmp(scratch2, Operand(kFlatAsciiStringTag));
   b(ne, failure);
 }
 
 
 void MacroAssembler::JumpIfInstanceTypeIsNotSequentialAscii(Register type,
                                                             Register scratch,
                                                             Label* failure) {
+  ASSERT(!type.is(sh4_rtmp) && !scratch.is(sh4_rtmp));
+
   int kFlatAsciiStringMask =
       kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
   int kFlatAsciiStringTag = ASCII_STRING_TYPE;
-  and_(scratch, type, Operand(kFlatAsciiStringMask));
+  RECORD_LINE();
+  land(scratch, type, Operand(kFlatAsciiStringMask));
   cmp(scratch, Operand(kFlatAsciiStringTag));
   b(ne, failure);
 }
 
 static const int kRegisterPassedArguments = 4;
 
 
 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
                                               int num_double_arguments) {
   int stack_passed_words = 0;
-  if (use_eabi_hardfloat()) {
-    // In the hard floating point calling convention, we can use
-    // all double registers to pass doubles.
-    if (num_double_arguments > DoubleRegister::kNumRegisters) {
-      stack_passed_words +=
-          2 * (num_double_arguments - DoubleRegister::kNumRegisters);
-    }
-  } else {
-    // In the soft floating point calling convention, every double
-    // argument is passed using two registers.
-    num_reg_arguments += 2 * num_double_arguments;
-  }
-  // Up to four simple arguments are passed in registers r0..r3.
+  // Up to 4 simple arguments are passed in [r4, r7]
   if (num_reg_arguments > kRegisterPassedArguments) {
     stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
   }
+
+  // Up to 4 double arguments are passed in [dr4, dr10]
+  if (num_double_arguments > kRegisterPassedArguments) {
+    stack_passed_words += 2 * (num_double_arguments - kRegisterPassedArguments);
+  }
+
   return stack_passed_words;
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           int num_double_arguments,
                                           Register scratch) {
-  int frame_alignment = ActivationFrameAlignment();
-  int stack_passed_arguments = CalculateStackPassedWords(
-      num_reg_arguments, num_double_arguments);
+  ASSERT(!scratch.is(sh4_ip));
+  ASSERT(!scratch.is(sh4_rtmp));
+  // Depending on the number of registers used, assert on the right scratch
+  // registers.
+  ASSERT((num_reg_arguments < 1 || !scratch.is(r4)) &&
+         (num_reg_arguments < 2 || !scratch.is(r5)) &&
+         (num_reg_arguments < 3 || !scratch.is(r6)) &&
+         (num_reg_arguments < 4 || !scratch.is(r7)));
+  int frame_alignment = OS::ActivationFrameAlignment();
+  int stack_passed_arguments = CalculateStackPassedWords(num_reg_arguments,
+                                                         num_double_arguments);
   if (frame_alignment > kPointerSize) {
+    RECORD_LINE();
     // Make stack end at alignment and make room for num_arguments - 4 words
     // and the original value of sp.
     mov(scratch, sp);
     sub(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
     ASSERT(IsPowerOf2(frame_alignment));
-    and_(sp, sp, Operand(-frame_alignment));
+    land(sp, sp, Operand(-frame_alignment));
     str(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
+    RECORD_LINE();
     sub(sp, sp, Operand(stack_passed_arguments * kPointerSize));
   }
 }
 
 
 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
                                           Register scratch) {
   PrepareCallCFunction(num_reg_arguments, 0, scratch);
 }
 
 
-void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  if (use_eabi_hardfloat()) {
-    Move(d0, dreg);
-  } else {
-    vmov(r0, r1, dreg);
-  }
-}
-
-
-void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1,
-                                             DoubleRegister dreg2) {
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  if (use_eabi_hardfloat()) {
-    if (dreg2.is(d0)) {
-      ASSERT(!dreg1.is(d1));
-      Move(d1, dreg2);
-      Move(d0, dreg1);
-    } else {
-      Move(d0, dreg1);
-      Move(d1, dreg2);
-    }
-  } else {
-    vmov(r0, r1, dreg1);
-    vmov(r2, r3, dreg2);
-  }
-}
-
-
-void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg,
-                                             Register reg) {
-  ASSERT(CpuFeatures::IsSupported(VFP2));
-  if (use_eabi_hardfloat()) {
-    Move(d0, dreg);
-    Move(r0, reg);
-  } else {
-    Move(r2, reg);
-    vmov(r0, r1, dreg);
-  }
-}
-
-
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_reg_arguments,
                                    int num_double_arguments) {
-  mov(ip, Operand(function));
-  CallCFunctionHelper(ip, num_reg_arguments, num_double_arguments);
+  RECORD_LINE();
+    mov(r3, Operand(function));
+  CallCFunctionHelper(r3, num_reg_arguments, num_double_arguments);
 }
 
 
-void MacroAssembler::CallCFunction(Register function,
-                                   int num_reg_arguments,
-                                   int num_double_arguments) {
-  CallCFunctionHelper(function, num_reg_arguments, num_double_arguments);
-}
-
-
-void MacroAssembler::CallCFunction(ExternalReference function,
-                                   int num_arguments) {
-  CallCFunction(function, num_arguments, 0);
-}
-
-
-void MacroAssembler::CallCFunction(Register function,
-                                   int num_arguments) {
-  CallCFunction(function, num_arguments, 0);
-}
-
-
 void MacroAssembler::CallCFunctionHelper(Register function,
                                          int num_reg_arguments,
                                          int num_double_arguments) {
   ASSERT(has_frame());
-  // Make sure that the stack is aligned before calling a C function unless
-  // running in the simulator. The simulator has its own alignment check which
-  // provides more information.
-#if defined(V8_HOST_ARCH_ARM)
+  ASSERT(!function.is(sh4_ip));
+  ASSERT(!function.is(sh4_rtmp));
+#if defined(V8_HOST_ARCH_SH4)
   if (emit_debug_code()) {
     int frame_alignment = OS::ActivationFrameAlignment();
     int frame_alignment_mask = frame_alignment - 1;
     if (frame_alignment > kPointerSize) {
       ASSERT(IsPowerOf2(frame_alignment));
       Label alignment_as_expected;
       tst(sp, Operand(frame_alignment_mask));
       b(eq, &alignment_as_expected);
       // Don't use Check here, as it will call Runtime_Abort possibly
       // re-entering here.
       stop("Unexpected alignment");
       bind(&alignment_as_expected);
     }
   }
 #endif
 
   // Just call directly. The function called cannot cause a GC, or
   // allow preemption, so the return address in the link register
   // stays correct.
-  Call(function);
+  jsr(function);
   int stack_passed_arguments = CalculateStackPassedWords(
       num_reg_arguments, num_double_arguments);
-  if (ActivationFrameAlignment() > kPointerSize) {
+  if (OS::ActivationFrameAlignment() > kPointerSize) {
     ldr(sp, MemOperand(sp, stack_passed_arguments * kPointerSize));
   } else {
     add(sp, sp, Operand(stack_passed_arguments * sizeof(kPointerSize)));
   }
 }
 
 
 void MacroAssembler::GetRelocatedValueLocation(Register ldr_location,
                                Register result) {
-  const uint32_t kLdrOffsetMask = (1 << 12) - 1;
-  const int32_t kPCRegOffset = 2 * kPointerSize;
-  ldr(result, MemOperand(ldr_location));
-  if (emit_debug_code()) {
-    // Check that the instruction is a ldr reg, [pc + offset] .
-    and_(result, result, Operand(kLdrPCPattern));
-    cmp(result, Operand(kLdrPCPattern));
-    Check(eq, "The instruction to patch should be a load from pc.");
-    // Result was clobbered. Restore it.
-    ldr(result, MemOperand(ldr_location));
-  }
-  // Get the address of the constant.
-  and_(result, result, Operand(kLdrOffsetMask));
-  add(result, ldr_location, Operand(result));
-  add(result, result, Operand(kPCRegOffset));
+  UNIMPLEMENTED_BREAK();
 }
 
 
 void MacroAssembler::CheckPageFlag(
     Register object,
     Register scratch,
     int mask,
     Condition cc,
     Label* condition_met) {
-  Bfc(scratch, object, 0, kPageSizeBits);
+  land(scratch, object, Operand(~Page::kPageAlignmentMask));
   ldr(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
-  tst(scratch, Operand(mask));
-  b(cc, condition_met);
+  cmphs(scratch, Operand(mask));
+  bf(condition_met);
 }
 
 
 void MacroAssembler::JumpIfBlack(Register object,
                                  Register scratch0,
                                  Register scratch1,
                                  Label* on_black) {
   HasColor(object, scratch0, scratch1, on_black, 1, 0);  // kBlackBitPattern.
   ASSERT(strcmp(Marking::kBlackBitPattern, "10") == 0);
 }
 
 
 void MacroAssembler::HasColor(Register object,
                               Register bitmap_scratch,
                               Register mask_scratch,
                               Label* has_color,
                               int first_bit,
                               int second_bit) {
   ASSERT(!AreAliased(object, bitmap_scratch, mask_scratch, no_reg));
 
   GetMarkBits(object, bitmap_scratch, mask_scratch);
 
   Label other_color, word_boundary;
   ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
-  tst(ip, Operand(mask_scratch));
+  tst(ip, mask_scratch);
   b(first_bit == 1 ? eq : ne, &other_color);
   // Shift left 1 by adding.
-  add(mask_scratch, mask_scratch, Operand(mask_scratch), SetCC);
+  add(mask_scratch, mask_scratch, mask_scratch);
+  tst(mask_scratch, mask_scratch);
   b(eq, &word_boundary);
-  tst(ip, Operand(mask_scratch));
+  tst(ip, mask_scratch);
   b(second_bit == 1 ? ne : eq, has_color);
   jmp(&other_color);
 
   bind(&word_boundary);
   ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kPointerSize));
   tst(ip, Operand(1));
   b(second_bit == 1 ? ne : eq, has_color);
   bind(&other_color);
 }
 
 
-// Detect some, but not all, common pointer-free objects.  This is used by the
-// incremental write barrier which doesn't care about oddballs (they are always
-// marked black immediately so this code is not hit).
-void MacroAssembler::JumpIfDataObject(Register value,
-                                      Register scratch,
-                                      Label* not_data_object) {
-  Label is_data_object;
-  ldr(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
-  CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);
-  b(eq, &is_data_object);
-  ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
-  ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
-  // If it's a string and it's not a cons string then it's an object containing
-  // no GC pointers.
-  ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
-  tst(scratch, Operand(kIsIndirectStringMask | kIsNotStringMask));
-  b(ne, not_data_object);
-  bind(&is_data_object);
-}
-
-
 void MacroAssembler::GetMarkBits(Register addr_reg,
                                  Register bitmap_reg,
                                  Register mask_reg) {
   ASSERT(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));
-  and_(bitmap_reg, addr_reg, Operand(~Page::kPageAlignmentMask));
+  land(bitmap_reg, addr_reg, Operand(~Page::kPageAlignmentMask));
   Ubfx(mask_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);
   const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
   Ubfx(ip, addr_reg, kLowBits, kPageSizeBits - kLowBits);
-  add(bitmap_reg, bitmap_reg, Operand(ip, LSL, kPointerSizeLog2));
+  lsl(ip, ip, Operand(kPointerSizeLog2));
+  add(bitmap_reg, bitmap_reg, ip);
   mov(ip, Operand(1));
-  mov(mask_reg, Operand(ip, LSL, mask_reg));
+  lsl(mask_reg, ip, mask_reg);
 }
 
 
 void MacroAssembler::EnsureNotWhite(
     Register value,
     Register bitmap_scratch,
     Register mask_scratch,
     Register load_scratch,
     Label* value_is_white_and_not_data) {
   ASSERT(!AreAliased(value, bitmap_scratch, mask_scratch, ip));
@@ skipping 10 matching lines @@
   // Since both black and grey have a 1 in the first position and white does
   // not have a 1 there we only need to check one bit.
   ldr(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
   tst(mask_scratch, load_scratch);
   b(ne, &done);
 
   if (emit_debug_code()) {
     // Check for impossible bit pattern.
     Label ok;
     // LSL may overflow, making the check conservative.
-    tst(load_scratch, Operand(mask_scratch, LSL, 1));
+    lsl(ip, mask_scratch, Operand(1));
+    tst(load_scratch, ip);
     b(eq, &ok);
     stop("Impossible marking bit pattern");
     bind(&ok);
   }
 
   // Value is white.  We check whether it is data that doesn't need scanning.
   // Currently only checks for HeapNumber and non-cons strings.
   Register map = load_scratch;  // Holds map while checking type.
   Register length = load_scratch;  // Holds length of object after testing type.
   Label is_data_object;
 
   // Check for heap-number
   ldr(map, FieldMemOperand(value, HeapObject::kMapOffset));
   CompareRoot(map, Heap::kHeapNumberMapRootIndex);
-  mov(length, Operand(HeapNumber::kSize), LeaveCC, eq);
+  mov(length, Operand(HeapNumber::kSize), eq);
   b(eq, &is_data_object);
 
   // Check for strings.
   ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
   ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
   // If it's a string and it's not a cons string then it's an object containing
   // no GC pointers.
   Register instance_type = load_scratch;
   ldrb(instance_type, FieldMemOperand(map, Map::kInstanceTypeOffset));
   tst(instance_type, Operand(kIsIndirectStringMask | kIsNotStringMask));
   b(ne, value_is_white_and_not_data);
   // It's a non-indirect (non-cons and non-slice) string.
   // If it's external, the length is just ExternalString::kSize.
   // Otherwise it's String::kHeaderSize + string->length() * (1 or 2).
   // External strings are the only ones with the kExternalStringTag bit
   // set.
   ASSERT_EQ(0, kSeqStringTag & kExternalStringTag);
   ASSERT_EQ(0, kConsStringTag & kExternalStringTag);
   tst(instance_type, Operand(kExternalStringTag));
-  mov(length, Operand(ExternalString::kSize), LeaveCC, ne);
+  mov(length, Operand(ExternalString::kSize), ne);
   b(ne, &is_data_object);
 
   // Sequential string, either ASCII or UC16.
   // For ASCII (char-size of 1) we shift the smi tag away to get the length.
   // For UC16 (char-size of 2) we just leave the smi tag in place, thereby
   // getting the length multiplied by 2.
   ASSERT(kAsciiStringTag == 4 && kStringEncodingMask == 4);
   ASSERT(kSmiTag == 0 && kSmiTagSize == 1);
   ldr(ip, FieldMemOperand(value, String::kLengthOffset));
   tst(instance_type, Operand(kStringEncodingMask));
-  mov(ip, Operand(ip, LSR, 1), LeaveCC, ne);
+  Label skip;
+  bt(&skip);
+  lsr(ip, ip, Operand(1));
+  bind(&skip);
   add(length, ip, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
-  and_(length, length, Operand(~kObjectAlignmentMask));
+  land(length, length, Operand(~kObjectAlignmentMask));
 
   bind(&is_data_object);
   // Value is a data object, and it is white.  Mark it black.  Since we know
   // that the object is white we can make it black by flipping one bit.
   ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
-  orr(ip, ip, Operand(mask_scratch));
+  orr(ip, ip, mask_scratch);
   str(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
 
-  and_(bitmap_scratch, bitmap_scratch, Operand(~Page::kPageAlignmentMask));
+  land(bitmap_scratch, bitmap_scratch, Operand(~Page::kPageAlignmentMask));
   ldr(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
-  add(ip, ip, Operand(length));
+  add(ip, ip, length);
   str(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
 
   bind(&done);
 }
 
 
-void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
-  Usat(output_reg, 8, Operand(input_reg));
-}
-
-
-void MacroAssembler::ClampDoubleToUint8(Register result_reg,
-                                        DoubleRegister input_reg,
-                                        DoubleRegister temp_double_reg) {
-  Label above_zero;
-  Label done;
-  Label in_bounds;
-
-  Vmov(temp_double_reg, 0.0);
-  VFPCompareAndSetFlags(input_reg, temp_double_reg);
-  b(gt, &above_zero);
-
-  // Double value is less than zero, NaN or Inf, return 0.
-  mov(result_reg, Operand(0));
-  b(al, &done);
-
-  // Double value is >= 255, return 255.
-  bind(&above_zero);
-  Vmov(temp_double_reg, 255.0, result_reg);
-  VFPCompareAndSetFlags(input_reg, temp_double_reg);
-  b(le, &in_bounds);
-  mov(result_reg, Operand(255));
-  b(al, &done);
-
-  // In 0-255 range, round and truncate.
-  bind(&in_bounds);
-  // Save FPSCR.
-  vmrs(ip);
-  // Set rounding mode to round to the nearest integer by clearing bits[23:22].
-  bic(result_reg, ip, Operand(kVFPRoundingModeMask));
-  vmsr(result_reg);
-  vcvt_s32_f64(input_reg.low(), input_reg, kFPSCRRounding);
-  vmov(result_reg, input_reg.low());
-  // Restore FPSCR.
-  vmsr(ip);
-  bind(&done);
-}
-
-
 void MacroAssembler::LoadInstanceDescriptors(Register map,
-                                             Register descriptors) {
+                                             Register descriptors,
+                                             Register scratch) {
   ldr(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
 }
 
 
 void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
   ldr(dst, FieldMemOperand(map, Map::kBitField3Offset));
   DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
 }
 
 
 void MacroAssembler::EnumLength(Register dst, Register map) {
   STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
   ldr(dst, FieldMemOperand(map, Map::kBitField3Offset));
-  and_(dst, dst, Operand(Smi::FromInt(Map::EnumLengthBits::kMask)));
+  land(dst, dst, Operand(Smi::FromInt(Map::EnumLengthBits::kMask)));
 }
 
 
 void MacroAssembler::CheckEnumCache(Register null_value, Label* call_runtime) {
   Register  empty_fixed_array_value = r6;
   LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
   Label next, start;
   mov(r2, r0);
 
   // Check if the enum length field is properly initialized, indicating that
@@ skipping 45 matching lines @@
   if (reg4.is_valid()) regs |= reg4.bit();
   if (reg5.is_valid()) regs |= reg5.bit();
   if (reg6.is_valid()) regs |= reg6.bit();
   int n_of_non_aliasing_regs = NumRegs(regs);
 
   return n_of_valid_regs != n_of_non_aliasing_regs;
 }
 #endif
 
 
+void MacroAssembler::Drop(int stack_elements) {
+  RECORD_LINE();
+  if (stack_elements > 0) {
+    RECORD_LINE();
+    add(sp, sp, Operand(stack_elements * kPointerSize));
+  }
+}
+
+
+void MacroAssembler::UnimplementedBreak(const char *file, int line) {
+  uint32_t file_id = 0;
+  const char *base = strrchr(file, '/');
+  if (base == NULL)
+    base = file;
+  while (*base) {
+    file_id += *base;
+    base++;
+  }
+  RECORD_LINE();
+  mov(r0, Operand(file_id));
+  mov(r1, Operand(line));
+  bkpt();
+}
+
+
+void MacroAssembler::Ret(Condition cond) {
+  ASSERT(cond == al || cond == eq || cond == ne);
+  if (cond == al) {
+    RECORD_LINE();
+    rts();
+  } else {
+    RECORD_LINE();
+    Label skip;
+    if (cond == eq) {
+      bf_near(&skip);
+    } else {
+      bt_near(&skip);
+    }
+    rts();
+    bind(&skip);
+  }
+}
+
+
+MacroAssembler* MacroAssembler::RecordFunctionLine(const char* function,
+                                                   int line) {
+  if (FLAG_code_comments) {
+    /* 10(strlen of MAXINT) + 1(separator) +1(nul). */
+    int size = strlen("/line/")+strlen(function) + 10 + 1 + 1;
+    char *buffer = new char[size];
+    snprintf(buffer, size, "/line/%s/%d", function, line);
+    buffer[size-1] = '\0';
+    RecordComment(buffer);
+  }
+  return this;
+}
+
+
 CodePatcher::CodePatcher(byte* address, int instructions)
     : address_(address),
       instructions_(instructions),
       size_(instructions * Assembler::kInstrSize),
       masm_(NULL, address, size_ + Assembler::kGap) {
   // Create a new macro assembler pointing to the address of the code to patch.
   // The size is adjusted with kGap on order for the assembler to generate size
   // bytes of instructions without failing with buffer size constraints.
   ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
 }
 
 
 CodePatcher::~CodePatcher() {
   // Indicate that code has changed.
   CPU::FlushICache(address_, size_);
 
   // Check that the code was patched as expected.
   ASSERT(masm_.pc_ == address_ + size_);
   ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
 }
 
 
-void CodePatcher::Emit(Instr instr) {
-  masm()->emit(instr);
-}
-
-
-void CodePatcher::Emit(Address addr) {
-  masm()->emit(reinterpret_cast<Instr>(addr));
-}
-
-
 void CodePatcher::EmitCondition(Condition cond) {
   Instr instr = Assembler::instr_at(masm_.pc_);
-  instr = (instr & ~kCondMask) | cond;
+  ASSERT(cond == eq || cond == ne);
+  ASSERT(Assembler::IsBranch(instr));
+  instr = (instr & ~0x200);     // Changed to bt
+  if (cond == ne)
+    instr |= 0x200;             // Changed to bf
   masm_.emit(instr);
 }
 
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_ARM
+#endif  // V8_TARGET_ARCH_IA32