First draft of the sh4 port

src/sh4/code-stubs-sh4.h

-// Copyright 2012 the V8 project authors. All rights reserved.
+// Copyright 2011-2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
 //       with the distribution.
 //     * Neither the name of Google Inc. nor the names of its
 //       contributors may be used to endorse or promote products derived
 //       from this software without specific prior written permission.
 //
 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-#ifndef V8_ARM_CODE_STUBS_ARM_H_
-#define V8_ARM_CODE_STUBS_ARM_H_
+#ifndef V8_SH4_CODE_STUBS_SH4_H_
+#define V8_SH4_CODE_STUBS_SH4_H_
 
 #include "ic-inl.h"
 
 namespace v8 {
 namespace internal {
 
 
 // Compute a transcendental math function natively, or call the
 // TranscendentalCache runtime function.
 class TranscendentalCacheStub: public CodeStub {
@@ skipping 102 matching lines @@
 };
 
 
 class BinaryOpStub: public CodeStub {
  public:
   BinaryOpStub(Token::Value op, OverwriteMode mode)
       : op_(op),
         mode_(mode),
         operands_type_(BinaryOpIC::UNINITIALIZED),
         result_type_(BinaryOpIC::UNINITIALIZED) {
-    use_vfp2_ = CpuFeatures::IsSupported(VFP2);
+    use_fpu_ = CpuFeatures::IsSupported(FPU);
     ASSERT(OpBits::is_valid(Token::NUM_TOKENS));
   }
 
   BinaryOpStub(
       int key,
       BinaryOpIC::TypeInfo operands_type,
       BinaryOpIC::TypeInfo result_type = BinaryOpIC::UNINITIALIZED)
       : op_(OpBits::decode(key)),
         mode_(ModeBits::decode(key)),
-        use_vfp2_(VFP2Bits::decode(key)),
+        use_fpu_(FPUBits::decode(key)),
         operands_type_(operands_type),
         result_type_(result_type) { }
 
  private:
   enum SmiCodeGenerateHeapNumberResults {
     ALLOW_HEAPNUMBER_RESULTS,
     NO_HEAPNUMBER_RESULTS
   };
 
   Token::Value op_;
   OverwriteMode mode_;
-  bool use_vfp2_;
+  bool use_fpu_;
 
   // Operand type information determined at runtime.
   BinaryOpIC::TypeInfo operands_type_;
   BinaryOpIC::TypeInfo result_type_;
 
   virtual void PrintName(StringStream* stream);
 
   // Minor key encoding in 16 bits RRRTTTVOOOOOOOMM.
   class ModeBits: public BitField<OverwriteMode, 0, 2> {};
   class OpBits: public BitField<Token::Value, 2, 7> {};
-  class VFP2Bits: public BitField<bool, 9, 1> {};
+  class FPUBits: public BitField<bool, 9, 1> {};
   class OperandTypeInfoBits: public BitField<BinaryOpIC::TypeInfo, 10, 3> {};
   class ResultTypeInfoBits: public BitField<BinaryOpIC::TypeInfo, 13, 3> {};
 
   Major MajorKey() { return BinaryOp; }
   int MinorKey() {
     return OpBits::encode(op_)
            | ModeBits::encode(mode_)
-           | VFP2Bits::encode(use_vfp2_)
+           | FPUBits::encode(use_fpu_)
            | OperandTypeInfoBits::encode(operands_type_)
            | ResultTypeInfoBits::encode(result_type_);
   }
 
   void Generate(MacroAssembler* masm);
   void GenerateGeneric(MacroAssembler* masm);
   void GenerateSmiSmiOperation(MacroAssembler* masm);
   void GenerateFPOperation(MacroAssembler* masm,
                            bool smi_operands,
                            Label* not_numbers,
@@ skipping 83 matching lines @@
                                                    Register scratch1,
                                                    Register scratch2,
                                                    Register scratch3,
                                                    Register scratch4,
                                                    Register scratch5,
                                                    Label* not_found);
 
   // Generate string hash.
   static void GenerateHashInit(MacroAssembler* masm,
                                Register hash,
-                               Register character);
+                               Register character,
+                               Register scratch);
 
   static void GenerateHashAddCharacter(MacroAssembler* masm,
                                        Register hash,
-                                       Register character);
+                                       Register character,
+                                       Register scratch);
 
   static void GenerateHashGetHash(MacroAssembler* masm,
-                                  Register hash);
+                                  Register hash,
+                                  Register scratch);
 
  private:
   DISALLOW_IMPLICIT_CONSTRUCTORS(StringHelper);
 };
 
 
 // Flag that indicates how to generate code for the stub StringAddStub.
 enum StringAddFlags {
   NO_STRING_ADD_FLAGS = 0,
   // Omit left string check in stub (left is definitely a string).
@@ skipping 163 matching lines @@
     STORE_BUFFER_ONLY,
     INCREMENTAL,
     INCREMENTAL_COMPACTION
   };
 
   virtual bool IsPregenerated();
   static void GenerateFixedRegStubsAheadOfTime();
   virtual bool SometimesSetsUpAFrame() { return false; }
 
   static void PatchBranchIntoNop(MacroAssembler* masm, int pos) {
-    masm->instr_at_put(pos, (masm->instr_at(pos) & ~B27) | (B24 | B20));
-    ASSERT(Assembler::IsTstImmediate(masm->instr_at(pos)));
+    UNIMPLEMENTED();
   }
 
   static void PatchNopIntoBranch(MacroAssembler* masm, int pos) {
-    masm->instr_at_put(pos, (masm->instr_at(pos) & ~(B24 | B20)) | B27);
-    ASSERT(Assembler::IsBranch(masm->instr_at(pos)));
+    UNIMPLEMENTED();
   }
 
   static Mode GetMode(Code* stub) {
-    Instr first_instruction = Assembler::instr_at(stub->instruction_start());
-    Instr second_instruction = Assembler::instr_at(stub->instruction_start() +
-                                                   Assembler::kInstrSize);
-
-    if (Assembler::IsBranch(first_instruction)) {
-      return INCREMENTAL;
-    }
-
-    ASSERT(Assembler::IsTstImmediate(first_instruction));
-
-    if (Assembler::IsBranch(second_instruction)) {
-      return INCREMENTAL_COMPACTION;
-    }
-
-    ASSERT(Assembler::IsTstImmediate(second_instruction));
-
+    // TODO(STM): UNIMPLEMENTED
     return STORE_BUFFER_ONLY;
   }
 
   static void Patch(Code* stub, Mode mode) {
-    MacroAssembler masm(NULL,
-                        stub->instruction_start(),
-                        stub->instruction_size());
-    switch (mode) {
-      case STORE_BUFFER_ONLY:
-        ASSERT(GetMode(stub) == INCREMENTAL ||
-               GetMode(stub) == INCREMENTAL_COMPACTION);
-        PatchBranchIntoNop(&masm, 0);
-        PatchBranchIntoNop(&masm, Assembler::kInstrSize);
-        break;
-      case INCREMENTAL:
-        ASSERT(GetMode(stub) == STORE_BUFFER_ONLY);
-        PatchNopIntoBranch(&masm, 0);
-        break;
-      case INCREMENTAL_COMPACTION:
-        ASSERT(GetMode(stub) == STORE_BUFFER_ONLY);
-        PatchNopIntoBranch(&masm, Assembler::kInstrSize);
-        break;
-    }
-    ASSERT(GetMode(stub) == mode);
-    CPU::FlushICache(stub->instruction_start(), 2 * Assembler::kInstrSize);
+    UNIMPLEMENTED();
   }
 
  private:
   // This is a helper class for freeing up 3 scratch registers.  The input is
   // two registers that must be preserved and one scratch register provided by
   // the caller.
   class RegisterAllocation {
    public:
     RegisterAllocation(Register object,
                        Register address,
@@ skipping 13 matching lines @@
     }
 
     void Restore(MacroAssembler* masm) {
       masm->pop(scratch1_);
     }
 
     // If we have to call into C then we need to save and restore all caller-
     // saved registers that were not already preserved.  The scratch registers
     // will be restored by other means so we don't bother pushing them here.
     void SaveCallerSaveRegisters(MacroAssembler* masm, SaveFPRegsMode mode) {
-      masm->stm(db_w, sp, (kCallerSaved | lr.bit()) & ~scratch1_.bit());
+      masm->pushm((kJSCallerSaved | pr.bit()) & ~scratch1_.bit());
       if (mode == kSaveFPRegs) {
-        CpuFeatures::Scope scope(VFP2);
-        masm->sub(sp,
-                  sp,
-                  Operand(kDoubleSize * (DwVfpRegister::kNumRegisters - 1)));
-        // Save all VFP registers except d0.
-        for (int i = DwVfpRegister::kNumRegisters - 1; i > 0; i--) {
-          DwVfpRegister reg = DwVfpRegister::from_code(i);
-          masm->vstr(reg, MemOperand(sp, (i - 1) * kDoubleSize));
-        }
+        UNIMPLEMENTED();
       }
     }
 
     inline void RestoreCallerSaveRegisters(MacroAssembler*masm,
                                            SaveFPRegsMode mode) {
       if (mode == kSaveFPRegs) {
-        CpuFeatures::Scope scope(VFP2);
-        // Restore all VFP registers except d0.
-        for (int i = DwVfpRegister::kNumRegisters - 1; i > 0; i--) {
-          DwVfpRegister reg = DwVfpRegister::from_code(i);
-          masm->vldr(reg, MemOperand(sp, (i - 1) * kDoubleSize));
-        }
-        masm->add(sp,
-                  sp,
-                  Operand(kDoubleSize * (DwVfpRegister::kNumRegisters - 1)));
+        UNIMPLEMENTED();
       }
-      masm->ldm(ia_w, sp, (kCallerSaved | lr.bit()) & ~scratch1_.bit());
+      masm->popm((kJSCallerSaved | pr.bit()) & ~scratch1_.bit());
     }
 
     inline Register object() { return object_; }
     inline Register address() { return address_; }
     inline Register scratch0() { return scratch0_; }
     inline Register scratch1() { return scratch1_; }
 
    private:
     Register object_;
     Register address_;
@@ skipping 76 matching lines @@
 };
 
 
 // Trampoline stub to call into native code. To call safely into native code
 // in the presence of compacting GC (which can move code objects) we need to
 // keep the code which called into native pinned in the memory. Currently the
 // simplest approach is to generate such stub early enough so it can never be
 // moved by GC
 class DirectCEntryStub: public CodeStub {
  public:
-  DirectCEntryStub() {}
+  explicit DirectCEntryStub(Register scratch) : scratch_(scratch) {}
   void Generate(MacroAssembler* masm);
-  void GenerateCall(MacroAssembler* masm, ExternalReference function);
-  void GenerateCall(MacroAssembler* masm, Register target);
+  void GenerateCall(MacroAssembler* masm, ExternalReference function,
+                    Register scratch1, Register scratch2);
+  void GenerateCall(MacroAssembler* masm, Register target, Register scratch1);
 
  private:
   Major MajorKey() { return DirectCEntry; }
   int MinorKey() { return 0; }
+  Register scratch_;
 
   bool NeedsImmovableCode() { return true; }
 };
 
 
 class FloatingPointHelper : public AllStatic {
  public:
   enum Destination {
     kVFPRegisters,
     kCoreRegisters
@@ skipping 52 matching lines @@
 
   // Load the number from object into double_dst in the double format.
   // Control will jump to not_int32 if the value cannot be exactly represented
   // by a 32-bit integer.
   // Floating point value in the 32-bit integer range that are not exact integer
   // won't be loaded.
   static void LoadNumberAsInt32Double(MacroAssembler* masm,
                                       Register object,
                                       Destination destination,
                                       DwVfpRegister double_dst,
-                                      DwVfpRegister double_scratch,
                                       Register dst1,
                                       Register dst2,
                                       Register heap_number_map,
                                       Register scratch1,
                                       Register scratch2,
                                       SwVfpRegister single_scratch,
                                       Label* not_int32);
 
   // Loads the number from object into dst as a 32-bit integer.
   // Control will jump to not_int32 if the object cannot be exactly represented
   // by a 32-bit integer.
   // Floating point value in the 32-bit integer range that are not exact integer
   // won't be converted.
   // scratch3 is not used when VFP3 is supported.
   static void LoadNumberAsInt32(MacroAssembler* masm,
                                 Register object,
                                 Register dst,
                                 Register heap_number_map,
                                 Register scratch1,
                                 Register scratch2,
                                 Register scratch3,
-                                DwVfpRegister double_scratch0,
-                                DwVfpRegister double_scratch1,
+                                DwVfpRegister double_scratch,
                                 Label* not_int32);
 
   // Generate non VFP3 code to check if a double can be exactly represented by a
   // 32-bit integer. This does not check for 0 or -0, which need
   // to be checked for separately.
   // Control jumps to not_int32 if the value is not a 32-bit integer, and falls
   // through otherwise.
   // src1 and src2 will be cloberred.
   //
   // Expected input:
@@ skipping 85 matching lines @@
   }
 
   class LookupModeBits: public BitField<LookupMode, 0, 1> {};
 
   LookupMode mode_;
 };
 
 
 } }  // namespace v8::internal
 
-#endif  // V8_ARM_CODE_STUBS_ARM_H_
+#endif  // V8_SH4_CODE_STUBS_SH4_H_