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| 1 // Copyright 2011-2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are |
| 4 // met: |
| 5 // |
| 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided |
| 11 // with the distribution. |
| 12 // * Neither the name of Google Inc. nor the names of its |
| 13 // contributors may be used to endorse or promote products derived |
| 14 // from this software without specific prior written permission. |
| 15 // |
| 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 |
| 28 #ifndef V8_SH4_CHECKS_SH4_H_ |
| 29 #define V8_SH4_CHECKS_SH4_H_ |
| 30 |
| 31 #define SH4_CHECK_RANGE_add_imm(imm) ((imm) >= -128 && (imm) <= 127) |
| 32 #define FITS_SH4_add_imm(imm) (SH4_CHECK_RANGE_add_imm(imm)) |
| 33 |
| 34 #define SH4_CHECK_RANGE_and_imm_R0(imm) ((imm) >= 0 && (imm) <= 255) |
| 35 #define FITS_SH4_and_imm_R0(imm) (SH4_CHECK_RANGE_and_imm_R0(imm)) |
| 36 |
| 37 #define SH4_CHECK_RANGE_andb_imm_dispR0GBR(imm) ((imm) >= 0 && (imm) <= 255) |
| 38 #define FITS_SH4_andb_imm_dispR0GBR(imm) \ |
| 39 (SH4_CHECK_RANGE_andb_imm_dispR0GBR(imm)) |
| 40 |
| 41 #define SH4_CHECK_RANGE_bra(imm) ((imm) >= -4096 && (imm) <= 4094) |
| 42 #define SH4_CHECK_ALIGN_bra(imm) (((imm) & 0x1) == 0) |
| 43 #define FITS_SH4_bra(imm) (SH4_CHECK_RANGE_bra(imm) && SH4_CHECK_ALIGN_bra(imm)) |
| 44 |
| 45 #define SH4_CHECK_RANGE_bsr(imm) ((imm) >= -4096 && (imm) <= 4094) |
| 46 #define SH4_CHECK_ALIGN_bsr(imm) (((imm) & 0x1) == 0) |
| 47 #define FITS_SH4_bsr(imm) (SH4_CHECK_RANGE_bsr(imm) && SH4_CHECK_ALIGN_bsr(imm)) |
| 48 |
| 49 #define SH4_CHECK_RANGE_bt(imm) ((imm) >= -256 && (imm) <= 254) |
| 50 #define SH4_CHECK_ALIGN_bt(imm) (((imm) & 0x1) == 0) |
| 51 #define FITS_SH4_bt(imm) (SH4_CHECK_RANGE_bt(imm) && SH4_CHECK_ALIGN_bt(imm)) |
| 52 |
| 53 #define SH4_CHECK_RANGE_bf(imm) ((imm) >= -256 && (imm) <= 254) |
| 54 #define SH4_CHECK_ALIGN_bf(imm) (((imm) & 0x1) == 0) |
| 55 #define FITS_SH4_bf(imm) (SH4_CHECK_RANGE_bf(imm) && SH4_CHECK_ALIGN_bf(imm)) |
| 56 |
| 57 #define SH4_CHECK_RANGE_bts(imm) ((imm) >= -256 && (imm) <= 254) |
| 58 #define SH4_CHECK_ALIGN_bts(imm) (((imm) & 0x1) == 0) |
| 59 #define FITS_SH4_bts(imm) (SH4_CHECK_RANGE_bts(imm) && SH4_CHECK_ALIGN_bts(imm)) |
| 60 |
| 61 #define SH4_CHECK_RANGE_bfs(imm) ((imm) >= -256 && (imm) <= 254) |
| 62 #define SH4_CHECK_ALIGN_bfs(imm) (((imm) & 0x1) == 0) |
| 63 #define FITS_SH4_bfs(imm) (SH4_CHECK_RANGE_bfs(imm) && SH4_CHECK_ALIGN_bfs(imm)) |
| 64 |
| 65 #define SH4_CHECK_RANGE_cmpeq_imm_R0(imm) ((imm) >= -128 && (imm) <= 127) |
| 66 #define FITS_SH4_cmpeq_imm_R0(imm) (SH4_CHECK_RANGE_cmpeq_imm_R0(imm)) |
| 67 |
| 68 #define SH4_CHECK_RANGE_ldc_bank(imm) ((imm) >= 0 && (imm) <= 7) |
| 69 #define FITS_SH4_ldc_bank(imm) (SH4_CHECK_RANGE_ldc_bank(imm)) |
| 70 |
| 71 #define SH4_CHECK_RANGE_ldcl_incRd_bank(imm) ((imm) >= 0 && (imm) <= 7) |
| 72 #define FITS_SH4_ldcl_incRd_bank(imm) (SH4_CHECK_RANGE_ldcl_incRd_bank(imm)) |
| 73 |
| 74 #define SH4_CHECK_RANGE_mov_imm(imm) ((imm) >= -128 && (imm) <= 127) |
| 75 #define FITS_SH4_mov_imm(imm) (SH4_CHECK_RANGE_mov_imm(imm)) |
| 76 |
| 77 #define SH4_CHECK_RANGE_movb_dispRs_R0(imm) ((imm) >= 0 && (imm) <= 15) |
| 78 #define FITS_SH4_movb_dispRs_R0(imm) (SH4_CHECK_RANGE_movb_dispRs_R0(imm)) |
| 79 |
| 80 #define SH4_CHECK_RANGE_movb_dispGBR_R0(imm) ((imm) >= 0 && (imm) <= 255) |
| 81 #define FITS_SH4_movb_dispGBR_R0(imm) (SH4_CHECK_RANGE_movb_dispGBR_R0(imm)) |
| 82 |
| 83 #define SH4_CHECK_RANGE_movb_R0_dispRd(imm) ((imm) >= 0 && (imm) <= 15) |
| 84 #define FITS_SH4_movb_R0_dispRd(imm) (SH4_CHECK_RANGE_movb_R0_dispRd(imm)) |
| 85 |
| 86 #define SH4_CHECK_RANGE_movb_R0_dispGBR(imm) ((imm) >= 0 && (imm) <= 255) |
| 87 #define FITS_SH4_movb_R0_dispGBR(imm) (SH4_CHECK_RANGE_movb_R0_dispGBR(imm)) |
| 88 |
| 89 #define SH4_CHECK_RANGE_movl_dispRd(imm) ((imm) >= 0 && (imm) <= 60) |
| 90 #define SH4_CHECK_ALIGN_movl_dispRd(imm) (((imm) & 0x3) == 0) |
| 91 #define FITS_SH4_movl_dispRd(imm) \ |
| 92 (SH4_CHECK_RANGE_movl_dispRd(imm) && SH4_CHECK_ALIGN_movl_dispRd(imm)) |
| 93 |
| 94 #define SH4_CHECK_RANGE_movl_dispRs(imm) ((imm) >= 0 && (imm) <= 60) |
| 95 #define SH4_CHECK_ALIGN_movl_dispRs(imm) (((imm) & 0x3) == 0) |
| 96 #define FITS_SH4_movl_dispRs(imm) \ |
| 97 (SH4_CHECK_RANGE_movl_dispRs(imm) && SH4_CHECK_ALIGN_movl_dispRs(imm)) |
| 98 |
| 99 #define SH4_CHECK_RANGE_movl_dispGBR_R0(imm) ((imm) >= 0 && (imm) <= 1020) |
| 100 #define SH4_CHECK_ALIGN_movl_dispGBR_R0(imm) (((imm) & 0x3) == 0) |
| 101 #define FITS_SH4_movl_dispGBR_R0(imm) \ |
| 102 (SH4_CHECK_RANGE_movl_dispGBR_R0(imm) && \ |
| 103 SH4_CHECK_ALIGN_movl_dispGBR_R0(imm)) |
| 104 |
| 105 #define SH4_CHECK_RANGE_movl_dispPC(imm) ((imm) >= 0 && (imm) <= 1020) |
| 106 #define SH4_CHECK_ALIGN_movl_dispPC(imm) (((imm) & 0x3) == 0) |
| 107 #define FITS_SH4_movl_dispPC(imm) \ |
| 108 (SH4_CHECK_RANGE_movl_dispPC(imm) && SH4_CHECK_ALIGN_movl_dispPC(imm)) |
| 109 |
| 110 #define SH4_CHECK_RANGE_movl_R0_dispGBR(imm) ((imm) >= 0 && (imm) <= 1020) |
| 111 #define SH4_CHECK_ALIGN_movl_R0_dispGBR(imm) (((imm) & 0x3) == 0) |
| 112 #define FITS_SH4_movl_R0_dispGBR(imm) \ |
| 113 (SH4_CHECK_RANGE_movl_R0_dispGBR(imm) && \ |
| 114 SH4_CHECK_ALIGN_movl_R0_dispGBR(imm)) |
| 115 |
| 116 #define SH4_CHECK_RANGE_movw_dispRs_R0(imm) ((imm) >= 0 && (imm) <= 30) |
| 117 #define SH4_CHECK_ALIGN_movw_dispRs_R0(imm) (((imm) & 0x1) == 0) |
| 118 #define FITS_SH4_movw_dispRs_R0(imm) \ |
| 119 (SH4_CHECK_RANGE_movw_dispRs_R0(imm) && \ |
| 120 SH4_CHECK_ALIGN_movw_dispRs_R0(imm)) |
| 121 |
| 122 #define SH4_CHECK_RANGE_movw_dispGBR_R0(imm) ((imm) >= 0 && (imm) <= 510) |
| 123 #define SH4_CHECK_ALIGN_movw_dispGBR_R0(imm) (((imm) & 0x1) == 0) |
| 124 #define FITS_SH4_movw_dispGBR_R0(imm) \ |
| 125 (SH4_CHECK_RANGE_movw_dispGBR_R0(imm) && \ |
| 126 SH4_CHECK_ALIGN_movw_dispGBR_R0(imm)) |
| 127 |
| 128 #define SH4_CHECK_RANGE_movw_dispPC(imm) ((imm) >= 0 && (imm) <= 510) |
| 129 #define SH4_CHECK_ALIGN_movw_dispPC(imm) (((imm) & 0x1) == 0) |
| 130 #define FITS_SH4_movw_dispPC(imm) \ |
| 131 (SH4_CHECK_RANGE_movw_dispPC(imm) && \ |
| 132 SH4_CHECK_ALIGN_movw_dispPC(imm)) |
| 133 |
| 134 #define SH4_CHECK_RANGE_movw_R0_dispRd(imm) ((imm) >= 0 && (imm) <= 30) |
| 135 #define SH4_CHECK_ALIGN_movw_R0_dispRd(imm) (((imm) & 0x1) == 0) |
| 136 #define FITS_SH4_movw_R0_dispRd(imm) \ |
| 137 (SH4_CHECK_RANGE_movw_R0_dispRd(imm) && \ |
| 138 SH4_CHECK_ALIGN_movw_R0_dispRd(imm)) |
| 139 |
| 140 #define SH4_CHECK_RANGE_movw_R0_dispGBR(imm) ((imm) >= 0 && (imm) <= 510) |
| 141 #define SH4_CHECK_ALIGN_movw_R0_dispGBR(imm) (((imm) & 0x1) == 0) |
| 142 #define FITS_SH4_movw_R0_dispGBR(imm) \ |
| 143 (SH4_CHECK_RANGE_movw_R0_dispGBR(imm) && \ |
| 144 SH4_CHECK_ALIGN_movw_R0_dispGBR(imm)) |
| 145 |
| 146 #define SH4_CHECK_RANGE_mova_dispPC_R0(imm) ((imm) >= 0 && (imm) <= 1020) |
| 147 #define SH4_CHECK_ALIGN_mova_dispPC_R0(imm) (((imm) & 0x3) == 0) |
| 148 #define FITS_SH4_mova_dispPC_R0(imm) \ |
| 149 (SH4_CHECK_RANGE_mova_dispPC_R0(imm) && \ |
| 150 SH4_CHECK_ALIGN_mova_dispPC_R0(imm)) |
| 151 |
| 152 #define SH4_CHECK_RANGE_or_imm_R0(imm) ((imm) >= 0 && (imm) <= 255) |
| 153 #define FITS_SH4_or_imm_R0(imm) (SH4_CHECK_RANGE_or_imm_R0(imm)) |
| 154 |
| 155 #define SH4_CHECK_RANGE_orb_imm_dispR0GBR(imm) ((imm) >= 0 && (imm) <= 255) |
| 156 #define FITS_SH4_orb_imm_dispR0GBR(imm) (SH4_CHECK_RANGE_orb_imm_dispR0GBR(imm)) |
| 157 |
| 158 #define SH4_CHECK_RANGE_stc_bank(imm) ((imm) >= 0 && (imm) <= 7) |
| 159 #define FITS_SH4_stc_bank(imm) (SH4_CHECK_RANGE_stc_bank(imm)) |
| 160 |
| 161 #define SH4_CHECK_RANGE_stcl_bank_decRd(imm) ((imm) >= 0 && (imm) <= 7) |
| 162 #define FITS_SH4_stcl_bank_decRd(imm) (SH4_CHECK_RANGE_stcl_bank_decRd(imm)) |
| 163 |
| 164 #define SH4_CHECK_RANGE_trapa_imm(imm) ((imm) >= 0 && (imm) <= 255) |
| 165 #define FITS_SH4_trapa_imm(imm) (SH4_CHECK_RANGE_trapa_imm(imm)) |
| 166 |
| 167 #define SH4_CHECK_RANGE_tst_imm_R0(imm) ((imm) >= 0 && (imm) <= 255) |
| 168 #define FITS_SH4_tst_imm_R0(imm) (SH4_CHECK_RANGE_tst_imm_R0(imm)) |
| 169 |
| 170 #define SH4_CHECK_RANGE_tstb_imm_dispR0GBR(imm) ((imm) >= 0 && (imm) <= 255) |
| 171 #define FITS_SH4_tstb_imm_dispR0GBR(imm) \ |
| 172 (SH4_CHECK_RANGE_tstb_imm_dispR0GBR(imm)) |
| 173 |
| 174 #define SH4_CHECK_RANGE_xor_imm_R0(imm) ((imm) >= 0 && (imm) <= 255) |
| 175 #define FITS_SH4_xor_imm_R0(imm) (SH4_CHECK_RANGE_xor_imm_R0(imm)) |
| 176 |
| 177 #define SH4_CHECK_RANGE_xorb_imm_dispR0GBR(imm) ((imm) >= 0 && (imm) <= 255) |
| 178 #define FITS_SH4_xorb_imm_dispR0GBR(imm) \ |
| 179 (SH4_CHECK_RANGE_xorb_imm_dispR0GBR(imm)) |
| 180 |
| 181 #endif // V8_SH4_CHECKS_SH4_H_ |
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