First draft of the sh4 port

src/platform-linux.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 266 matching lines @@
     }
   }
   fclose(f);
 
   // Did not find string in the proc file.
   return false;
 }
 #endif  // def __mips__
 
 
+#ifdef __sh__
+bool OS::SHCpuHasFeature(CpuFeature feature) {
+  switch (feature) {
+    case FPU:
+      // Assume FPU is always active.
+      // All supported SH4 implementation feature it
+      return true;
+    default:
+      UNREACHABLE();
+  }
+  return false;
+}
+#endif  // def __sh__
+
+
 int OS::ActivationFrameAlignment() {
 #ifdef V8_TARGET_ARCH_ARM
   // On EABI ARM targets this is required for fp correctness in the
   // runtime system.
   return 8;
 #elif V8_TARGET_ARCH_MIPS
   return 8;
+#elif V8_TARGET_ARCH_SH4
+  return 4;
 #endif
   // With gcc 4.4 the tree vectorization optimizer can generate code
   // that requires 16 byte alignment such as movdqa on x86.
   return 16;
 }
 
 
 void OS::ReleaseStore(volatile AtomicWord* ptr, AtomicWord value) {
 #if (defined(V8_TARGET_ARCH_ARM) && defined(__arm__)) || \
     (defined(V8_TARGET_ARCH_MIPS) && defined(__mips__))
@@ skipping 98 matching lines @@
 
 void OS::DebugBreak() {
 // TODO(lrn): Introduce processor define for runtime system (!= V8_ARCH_x,
 //  which is the architecture of generated code).
 #if (defined(__arm__) || defined(__thumb__))
 # if defined(CAN_USE_ARMV5_INSTRUCTIONS)
   asm("bkpt 0");
 # endif
 #elif defined(__mips__)
   asm("break");
+#elif defined(__sh__)
+  asm("ldtlb");
 #else
   asm("int $3");
 #endif
 }
 
 
 class PosixMemoryMappedFile : public OS::MemoryMappedFile {
  public:
   PosixMemoryMappedFile(FILE* file, void* memory, int size)
     : file_(file), memory_(memory), size_(size) { }
@@ skipping 640 matching lines @@
   sample->pc = reinterpret_cast<Address>(mcontext.gregs[R15]);
   sample->sp = reinterpret_cast<Address>(mcontext.gregs[R13]);
   sample->fp = reinterpret_cast<Address>(mcontext.gregs[R11]);
 #else
   sample->pc = reinterpret_cast<Address>(mcontext.arm_pc);
   sample->sp = reinterpret_cast<Address>(mcontext.arm_sp);
   sample->fp = reinterpret_cast<Address>(mcontext.arm_fp);
 #endif  // defined(__GLIBC__) && !defined(__UCLIBC__) &&
         // (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
 #elif V8_HOST_ARCH_MIPS
+  sample.pc = reinterpret_cast<Address>(mcontext.pc);
+  sample.sp = reinterpret_cast<Address>(mcontext.gregs[29]);
+  sample.fp = reinterpret_cast<Address>(mcontext.gregs[30]);
+#elif defined(V8_HOST_ARCH_SH4)
   sample->pc = reinterpret_cast<Address>(mcontext.pc);
-  sample->sp = reinterpret_cast<Address>(mcontext.gregs[29]);
-  sample->fp = reinterpret_cast<Address>(mcontext.gregs[30]);
+  sample->sp = reinterpret_cast<Address>(mcontext.gregs[R15]);
+  sample->fp = reinterpret_cast<Address>(mcontext.gregs[R14]);
 #endif  // V8_HOST_ARCH_*
   sampler->SampleStack(sample);
   sampler->Tick(sample);
 }
 
 
 class Sampler::PlatformData : public Malloced {
  public:
   PlatformData() : vm_tid_(GetThreadID()) {}
 
@@ skipping 228 matching lines @@
 
 
 void Sampler::Stop() {
   ASSERT(IsActive());
   SignalSender::RemoveActiveSampler(this);
   SetActive(false);
 }
 
 
 } }  // namespace v8::internal