VM: Don't emit usage counter and range feedback code and when optimizations are disabled.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
 #include "vm/dart_entry.h"
 #include "vm/flow_graph_compiler.h"
 #include "vm/heap.h"
 #include "vm/instructions.h"
 #include "vm/object_store.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 #include "vm/tags.h"
 
 #define __ assembler->
 
 namespace dart {
 
 DEFINE_FLAG(bool, inline_alloc, true, "Inline allocation of objects.");
 DEFINE_FLAG(bool, use_slow_path, false,
     "Set to true for debugging & verifying the slow paths.");
 DECLARE_FLAG(bool, trace_optimized_ic_calls);
+DECLARE_FLAG(int, optimization_counter_threshold);
 
 // Input parameters:
 //   RA : return address.
 //   SP : address of last argument in argument array.
 //   SP + 4*S4 - 4 : address of first argument in argument array.
 //   SP + 4*S4 : address of return value.
 //   S5 : address of the runtime function to call.
 //   S4 : number of arguments to the call.
 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) {
   const intptr_t isolate_offset = NativeArguments::isolate_offset();
@@ skipping 1292 matching lines @@
   }
   __ lw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
   __ addiu(T7, T7, Immediate(1));
   __ sw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
 }
 
 
 // Loads function into 'temp_reg'.
 void StubCode::GenerateUsageCounterIncrement(Assembler* assembler,
                                              Register temp_reg) {
-  __ Comment("UsageCounterIncrement");
-  Register ic_reg = S5;
-  Register func_reg = temp_reg;
-  ASSERT(temp_reg == T0);
-  __ Comment("Increment function counter");
-  __ lw(func_reg, FieldAddress(ic_reg, ICData::owner_offset()));
-  __ lw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
-  __ addiu(T1, T1, Immediate(1));
-  __ sw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
+  if (FLAG_optimization_counter_threshold != -1) {
+    __ Comment("UsageCounterIncrement");
+    Register ic_reg = S5;
+    Register func_reg = temp_reg;
+    ASSERT(temp_reg == T0);
+    __ Comment("Increment function counter");
+    __ lw(func_reg, FieldAddress(ic_reg, ICData::owner_offset()));
+    __ lw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
+    __ addiu(T1, T1, Immediate(1));
+    __ sw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
+  }
 }
 
 
 // Note: S5 must be preserved.
 // Attempt a quick Smi operation for known operations ('kind'). The ICData
 // must have been primed with a Smi/Smi check that will be used for counting
 // the invocations.
 static void EmitFastSmiOp(Assembler* assembler,
                           Token::Kind kind,
                           intptr_t num_args,
@@ skipping 38 matching lines @@
   Label error, ok;
   const int32_t imm_smi_cid = reinterpret_cast<int32_t>(Smi::New(kSmiCid));
   __ lw(T4, Address(T0));
   __ BranchNotEqual(T4, Immediate(imm_smi_cid), &error);
   __ lw(T4, Address(T0, kWordSize));
   __ BranchEqual(T4, Immediate(imm_smi_cid), &ok);
   __ Bind(&error);
   __ Stop("Incorrect IC data");
   __ Bind(&ok);
 #endif
-  // Update counter.
-  const intptr_t count_offset = ICData::CountIndexFor(num_args) * kWordSize;
-  __ lw(T4, Address(T0, count_offset));
-  __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
-  __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
-  __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
-  __ movz(T4, T7, CMPRES1);
-  __ sw(T4, Address(T0, count_offset));
+  if (FLAG_optimization_counter_threshold != -1) {
+    // Update counter.
+    const intptr_t count_offset = ICData::CountIndexFor(num_args) * kWordSize;
+    __ lw(T4, Address(T0, count_offset));
+    __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
+    __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
+    __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
+    __ movz(T4, T7, CMPRES1);
+    __ sw(T4, Address(T0, count_offset));
+  }
 
   __ Ret();
 }
 
 
 // Generate inline cache check for 'num_args'.
 //  RA: return address
 //  S5: Inline cache data object.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
@@ skipping 161 matching lines @@
   Label call_target_function;
   __ b(&call_target_function);
 
   __ Bind(&found);
   __ Comment("Update caller's counter");
   // T0: Pointer to an IC data check group.
   const intptr_t target_offset = ICData::TargetIndexFor(num_args) * kWordSize;
   const intptr_t count_offset = ICData::CountIndexFor(num_args) * kWordSize;
   __ lw(T3, Address(T0, target_offset));
 
-  // Update counter.
-  __ lw(T4, Address(T0, count_offset));
-  __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
-  __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
-  __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
-  __ movz(T4, T7, CMPRES1);
-  __ sw(T4, Address(T0, count_offset));
+  if (FLAG_optimization_counter_threshold != -1) {
+    // Update counter.
+    __ lw(T4, Address(T0, count_offset));
+    __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
+    __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
+    __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
+    __ movz(T4, T7, CMPRES1);
+    __ sw(T4, Address(T0, count_offset));
+  }
 
   __ Comment("Call target");
   __ Bind(&call_target_function);
   // T0 <- T3: Target function.
   __ mov(T0, T3);
   Label is_compiled;
   __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
   __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
   if (range_collection_mode == kCollectRanges) {
     const intptr_t frame_size = num_args + 2;
@@ skipping 169 matching lines @@
   __ Bind(&done_stepping);
 
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with entries: target functions and count.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
   const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize;
   const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize;
 
-  // Increment count for this call.
-  __ lw(T4, Address(T0, count_offset));
-  __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
-  __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
-  __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
-  __ movz(T4, T7, CMPRES1);
-  __ sw(T4, Address(T0, count_offset));
+  if (FLAG_optimization_counter_threshold != -1) {
+    // Increment count for this call.
+    __ lw(T4, Address(T0, count_offset));
+    __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
+    __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
+    __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
+    __ movz(T4, T7, CMPRES1);
+    __ sw(T4, Address(T0, count_offset));
+  }
 
   // Load arguments descriptor into S4.
   __ lw(S4,  FieldAddress(S5, ICData::arguments_descriptor_offset()));
 
   // Get function and call it, if possible.
   __ lw(T0, Address(T0, target_offset));
   __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
 
   // T4: target instructions.
   __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
@@ skipping 442 matching lines @@
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS