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| 1 ; Assembly test for simple arithmetic operations. |
| 2 |
| 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 4 ; RUN: --target x8632 -i %s --args -O2 \ |
| 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 6 |
| 7 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
| 8 ; once enough infrastructure is in. Also, switch to --filetype=obj |
| 9 ; when possible. |
| 10 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ |
| 11 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
| 12 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s |
| 13 |
| 14 define i32 @Add(i32 %a, i32 %b) { |
| 15 entry: |
| 16 %add = add i32 %b, %a |
| 17 ret i32 %add |
| 18 } |
| 19 ; CHECK-LABEL: Add |
| 20 ; CHECK: add e |
| 21 ; ARM32-LABEL: Add |
| 22 ; ARM32: add r |
| 23 |
| 24 define i32 @And(i32 %a, i32 %b) { |
| 25 entry: |
| 26 %and = and i32 %b, %a |
| 27 ret i32 %and |
| 28 } |
| 29 ; CHECK-LABEL: And |
| 30 ; CHECK: and e |
| 31 ; ARM32-LABEL: And |
| 32 ; ARM32: and r |
| 33 |
| 34 define i32 @Or(i32 %a, i32 %b) { |
| 35 entry: |
| 36 %or = or i32 %b, %a |
| 37 ret i32 %or |
| 38 } |
| 39 ; CHECK-LABEL: Or |
| 40 ; CHECK: or e |
| 41 ; ARM32-LABEL: Or |
| 42 ; ARM32: orr r |
| 43 |
| 44 define i32 @Xor(i32 %a, i32 %b) { |
| 45 entry: |
| 46 %xor = xor i32 %b, %a |
| 47 ret i32 %xor |
| 48 } |
| 49 ; CHECK-LABEL: Xor |
| 50 ; CHECK: xor e |
| 51 ; ARM32-LABEL: Xor |
| 52 ; ARM32: eor r |
| 53 |
| 54 define i32 @Sub(i32 %a, i32 %b) { |
| 55 entry: |
| 56 %sub = sub i32 %a, %b |
| 57 ret i32 %sub |
| 58 } |
| 59 ; CHECK-LABEL: Sub |
| 60 ; CHECK: sub e |
| 61 ; ARM32-LABEL: Sub |
| 62 ; ARM32: sub r |
| 63 |
| 64 define i32 @Mul(i32 %a, i32 %b) { |
| 65 entry: |
| 66 %mul = mul i32 %b, %a |
| 67 ret i32 %mul |
| 68 } |
| 69 ; CHECK-LABEL: Mul |
| 70 ; CHECK: imul e |
| 71 ; ARM32-LABEL: Mul |
| 72 ; ARM32: mul r |
| 73 |
| 74 ; Check for a valid ARM mul instruction where operands have to be registers. |
| 75 ; On the other hand x86-32 does allow an immediate. |
| 76 define i32 @MulImm(i32 %a, i32 %b) { |
| 77 entry: |
| 78 %mul = mul i32 %a, 99 |
| 79 ret i32 %mul |
| 80 } |
| 81 ; CHECK-LABEL: MulImm |
| 82 ; CHECK: imul e{{.*}},e{{.*}},0x63 |
| 83 ; ARM32-LABEL: MulImm |
| 84 ; ARM32: mov {{.*}}, #99 |
| 85 ; ARM32: mul r{{.*}}, r{{.*}}, r{{.*}} |
| 86 |
| 87 ; Check for a valid addressing mode in the x86-32 mul instruction when |
| 88 ; the second source operand is an immediate. |
| 89 define i64 @MulImm64(i64 %a) { |
| 90 entry: |
| 91 %mul = mul i64 %a, 99 |
| 92 ret i64 %mul |
| 93 } |
| 94 ; NOTE: the lowering is currently a bit inefficient for small 64-bit constants. |
| 95 ; The top bits of the immediate are 0, but the instructions modeling that |
| 96 ; multiply by 0 are not eliminated (see expanded 64-bit ARM lowering). |
| 97 ; CHECK-LABEL: MulImm64 |
| 98 ; CHECK: mov {{.*}},0x63 |
| 99 ; CHECK: mov {{.*}},0x0 |
| 100 ; CHECK-NOT: mul {{[0-9]+}} |
| 101 ; |
| 102 ; ARM32-LABEL: MulImm64 |
| 103 ; ARM32: mov {{.*}}, #99 |
| 104 ; ARM32: mov {{.*}}, #0 |
| 105 ; ARM32: mul r |
| 106 ; ARM32: mla r |
| 107 ; ARM32: umull r |
| 108 ; ARM32: add r |
| 109 |
| 110 define i32 @Sdiv(i32 %a, i32 %b) { |
| 111 entry: |
| 112 %div = sdiv i32 %a, %b |
| 113 ret i32 %div |
| 114 } |
| 115 ; CHECK-LABEL: Sdiv |
| 116 ; CHECK: cdq |
| 117 ; CHECK: idiv e |
| 118 ; ARM32-LABEL: Sdiv |
| 119 ; TODO(jvoung) -- implement divide and check here. |
| 120 ; The lowering needs to check if the denominator is 0 and trap, since |
| 121 ; ARM normally doesn't trap on divide by 0. |
| 122 |
| 123 define i32 @Srem(i32 %a, i32 %b) { |
| 124 entry: |
| 125 %rem = srem i32 %a, %b |
| 126 ret i32 %rem |
| 127 } |
| 128 ; CHECK-LABEL: Srem |
| 129 ; CHECK: cdq |
| 130 ; CHECK: idiv e |
| 131 ; ARM32-LABEL: Srem |
| 132 |
| 133 define i32 @Udiv(i32 %a, i32 %b) { |
| 134 entry: |
| 135 %div = udiv i32 %a, %b |
| 136 ret i32 %div |
| 137 } |
| 138 ; CHECK-LABEL: Udiv |
| 139 ; CHECK: div e |
| 140 ; ARM32-LABEL: Udiv |
| 141 |
| 142 define i32 @Urem(i32 %a, i32 %b) { |
| 143 entry: |
| 144 %rem = urem i32 %a, %b |
| 145 ret i32 %rem |
| 146 } |
| 147 ; CHECK-LABEL: Urem |
| 148 ; CHECK: div e |
| 149 ; ARM32-LABEL: Urem |
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