Lower a few basic ARM binops for i{8,16,32,64}.

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLoweringARM32 class, which implements the
@@ skipping 112 matching lines @@
   Variable *makeVectorOfZeros(Type Ty, int32_t RegNum = Variable::NoRegister);
 
   void makeRandomRegisterPermutation(
       llvm::SmallVectorImpl<int32_t> &Permutation,
       const llvm::SmallBitVector &ExcludeRegisters) const override;
 
   // The following are helpers that insert lowered ARM32 instructions
   // with minimal syntactic overhead, so that the lowering code can
   // look as close to assembly as practical.
 
+  void _add(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Add::create(Func, Dest, Src0, Src1));
+  }
+  void _adds(Variable *Dest, Variable *Src0, Operand *Src1) {
+    const bool SetFlags = true;
+    Context.insert(InstARM32Add::create(Func, Dest, Src0, Src1, SetFlags));
+  }
+  void _adc(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Adc::create(Func, Dest, Src0, Src1));
+  }
+  void _and(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32And::create(Func, Dest, Src0, Src1));
+  }
+  void _eor(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Eor::create(Func, Dest, Src0, Src1));
+  }
   void _ldr(Variable *Dest, OperandARM32Mem *Addr) {
     Context.insert(InstARM32Ldr::create(Func, Dest, Addr));
   }
+  void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc) {
+    Context.insert(InstARM32Mla::create(Func, Dest, Src0, Src1, Acc));
+  }
   // If Dest=nullptr is passed in, then a new variable is created,
   // marked as infinite register allocation weight, and returned
   // through the in/out Dest argument.
   void _mov(Variable *&Dest, Operand *Src0,
             int32_t RegNum = Variable::NoRegister) {
     if (Dest == nullptr)
       Dest = makeReg(Src0->getType(), RegNum);
     Context.insert(InstARM32Mov::create(Func, Dest, Src0));
   }
   // The Operand can only be a 16-bit immediate or a ConstantRelocatable
   // (with an upper16 relocation).
-  void _movt(Variable *&Dest, Operand *Src0) {
+  void _movt(Variable *Dest, Operand *Src0) {
     Context.insert(InstARM32Movt::create(Func, Dest, Src0));
   }
-  void _movw(Variable *&Dest, Operand *Src0) {
+  void _movw(Variable *Dest, Operand *Src0) {
     Context.insert(InstARM32Movw::create(Func, Dest, Src0));
   }
-  void _mvn(Variable *&Dest, Operand *Src0) {
+  void _mul(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert(InstARM32Mul::create(Func, Dest, Src0, Src1));
+  }
+  void _mvn(Variable *Dest, Operand *Src0) {
     Context.insert(InstARM32Mvn::create(Func, Dest, Src0));
   }
+  void _orr(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Orr::create(Func, Dest, Src0, Src1));
+  }
+  void _sbc(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1));
+  }
+  void _sub(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstARM32Sub::create(Func, Dest, Src0, Src1));
+  }
+  void _subs(Variable *Dest, Variable *Src0, Operand *Src1) {
+    const bool SetFlags = true;
+    Context.insert(InstARM32Sub::create(Func, Dest, Src0, Src1, SetFlags));
+  }
   void _ret(Variable *LR, Variable *Src0 = nullptr) {
     Context.insert(InstARM32Ret::create(Func, LR, Src0));
   }
+  void _umull(Variable *DestLo, Variable *DestHi, Variable *Src0,
+              Variable *Src1) {
+    Context.insert(InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1));
+    // Model the modification to the second dest as a fake def.
+    Context.insert(InstFakeDef::create(Func, DestHi, DestLo));
+  }
 
   bool UsesFramePointer;
   bool NeedsStackAlignment;
   llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
   llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
   static IceString RegNames[];
 
 private:
@@ skipping 18 matching lines @@
 
 private:
   void lowerGlobal(const VariableDeclaration &Var) const;
   ~TargetDataARM32() override {}
   template <typename T> static void emitConstantPool(GlobalContext *Ctx);
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H