Move megamorphic lookup code to stub instead of inlining. Preformance loss < 5%, instruction size r…

runtime/vm/flow_graph_compiler_ia32.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_IA32.
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
 #include "vm/code_patcher.h"
 #include "vm/compiler.h"
 #include "vm/cpu.h"
 #include "vm/dart_entry.h"
 #include "vm/deopt_instructions.h"
 #include "vm/flow_graph_builder.h"
 #include "vm/il_printer.h"
 #include "vm/locations.h"
 #include "vm/object_store.h"
 #include "vm/parser.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 #include "vm/symbols.h"
 #include "vm/verified_memory.h"
 
 namespace dart {
 
 DEFINE_FLAG(bool, trap_on_deoptimization, false, "Trap on deoptimization.");
 DEFINE_FLAG(bool, unbox_mints, true, "Optimize 64-bit integer arithmetic.");
+
 DECLARE_FLAG(bool, enable_type_checks);
 DECLARE_FLAG(bool, enable_simd_inline);
+DECLARE_FLAG(bool, use_megamorphic_stub);
 
 
 FlowGraphCompiler::~FlowGraphCompiler() {
   // BlockInfos are zone-allocated, so their destructors are not called.
   // Verify the labels explicitly here.
   for (int i = 0; i < block_info_.length(); ++i) {
     ASSERT(!block_info_[i]->jump_label()->IsLinked());
     ASSERT(!block_info_[i]->jump_label()->HasNear());
   }
 }
@@ skipping 1254 matching lines @@
   __ Drop(argument_count);
 }
 
 
 void FlowGraphCompiler::EmitMegamorphicInstanceCall(
     const ICData& ic_data,
     intptr_t argument_count,
     intptr_t deopt_id,
     intptr_t token_pos,
     LocationSummary* locs) {
-  MegamorphicCacheTable* table = Isolate::Current()->megamorphic_cache_table();
+  MegamorphicCacheTable* table = isolate()->megamorphic_cache_table();
   const String& name = String::Handle(ic_data.target_name());
   const Array& arguments_descriptor =
       Array::ZoneHandle(ic_data.arguments_descriptor());
   ASSERT(!arguments_descriptor.IsNull() && (arguments_descriptor.Length() > 0));
   const MegamorphicCache& cache =
       MegamorphicCache::ZoneHandle(table->Lookup(name, arguments_descriptor));
-  Label load_cache;
-  __ movl(EBX, Address(ESP, (argument_count - 1) * kWordSize));
-  __ LoadTaggedClassIdMayBeSmi(EAX, EBX);
+  __ movl(EDI, Address(ESP, (argument_count - 1) * kWordSize));
+  __ LoadObject(EBX, cache);
 
-  // EAX: class ID of the receiver (smi).
-  __ Bind(&load_cache);
-  __ LoadObject(EBX, cache);
-  __ movl(EDI, FieldAddress(EBX, MegamorphicCache::buckets_offset()));
-  __ movl(EBX, FieldAddress(EBX, MegamorphicCache::mask_offset()));
-  // EDI: cache buckets array.
-  // EBX: mask.
-  __ movl(ECX, EAX);
+  if (FLAG_use_megamorphic_stub) {
+    StubCode* stub_code = isolate()->stub_code();
+    __ call(&stub_code->MegamorphicLookupLabel());
+  } else  {
+    __ LoadTaggedClassIdMayBeSmi(EAX, EDI);
 
-  Label loop, update, call_target_function;
-  __ jmp(&loop);
+    // EAX: class ID of the receiver (smi).
+    __ movl(EDI, FieldAddress(EBX, MegamorphicCache::buckets_offset()));
+    __ movl(EBX, FieldAddress(EBX, MegamorphicCache::mask_offset()));
+    // EDI: cache buckets array.
+    // EBX: mask.
+    __ movl(ECX, EAX);
 
-  __ Bind(&update);
-  __ addl(ECX, Immediate(Smi::RawValue(1)));
-  __ Bind(&loop);
-  __ andl(ECX, EBX);
-  const intptr_t base = Array::data_offset();
-  // ECX is smi tagged, but table entries are two words, so TIMES_4.
-  __ movl(EDX, FieldAddress(EDI, ECX, TIMES_4, base));
+    Label loop, update, call_target_function;
+    __ jmp(&loop);
 
-  ASSERT(kIllegalCid == 0);
-  __ testl(EDX, EDX);
-  __ j(ZERO, &call_target_function, Assembler::kNearJump);
-  __ cmpl(EDX, EAX);
-  __ j(NOT_EQUAL, &update, Assembler::kNearJump);
+    __ Bind(&update);
+    __ addl(ECX, Immediate(Smi::RawValue(1)));
+    __ Bind(&loop);
+    __ andl(ECX, EBX);
+    const intptr_t base = Array::data_offset();
+    // ECX is smi tagged, but table entries are two words, so TIMES_4.
+    __ movl(EDX, FieldAddress(EDI, ECX, TIMES_4, base));
 
-  __ Bind(&call_target_function);
-  // Call the target found in the cache.  For a class id match, this is a
-  // proper target for the given name and arguments descriptor.  If the
-  // illegal class id was found, the target is a cache miss handler that can
-  // be invoked as a normal Dart function.
-  __ movl(EAX, FieldAddress(EDI, ECX, TIMES_4, base + kWordSize));
-  __ movl(EBX, FieldAddress(EAX, Function::instructions_offset()));
+    ASSERT(kIllegalCid == 0);
+    __ testl(EDX, EDX);
+    __ j(ZERO, &call_target_function, Assembler::kNearJump);
+    __ cmpl(EDX, EAX);
+    __ j(NOT_EQUAL, &update, Assembler::kNearJump);
+
+    __ Bind(&call_target_function);
+    // Call the target found in the cache.  For a class id match, this is a
+    // proper target for the given name and arguments descriptor.  If the
+    // illegal class id was found, the target is a cache miss handler that can
+    // be invoked as a normal Dart function.
+    __ movl(EAX, FieldAddress(EDI, ECX, TIMES_4, base + kWordSize));
+    __ movl(EBX, FieldAddress(EAX, Function::instructions_offset()));
+    __ addl(EBX, Immediate(Instructions::HeaderSize() - kHeapObjectTag));
+  }
+
   __ LoadObject(ECX, ic_data);
   __ LoadObject(EDX, arguments_descriptor);
-  __ addl(EBX, Immediate(Instructions::HeaderSize() - kHeapObjectTag));
   __ call(EBX);
   AddCurrentDescriptor(RawPcDescriptors::kOther,
       Isolate::kNoDeoptId, token_pos);
   RecordSafepoint(locs);
   const intptr_t deopt_id_after = Isolate::ToDeoptAfter(deopt_id);
   if (is_optimizing()) {
     AddDeoptIndexAtCall(deopt_id_after, token_pos);
   } else {
     // Add deoptimization continuation point after the call and before the
     // arguments are removed.
@@ skipping 479 matching lines @@
   __ movups(reg, Address(ESP, 0));
   __ addl(ESP, Immediate(kFpuRegisterSize));
 }
 
 
 #undef __
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_IA32