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Side by Side Diff: src/IceInstX8632.cpp

Issue 1125323004: Subzero: Use cmov to improve lowering for the select instruction. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove a rogue comment Created 5 years, 7 months ago
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1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the InstX8632 and OperandX8632 classes, 10 // This file implements the InstX8632 and OperandX8632 classes,
(...skipping 66 matching lines...) Expand 10 before | Expand all | Expand 10 after
77 } // end of anonymous namespace 77 } // end of anonymous namespace
78 78
79 const char *InstX8632::getWidthString(Type Ty) { 79 const char *InstX8632::getWidthString(Type Ty) {
80 return TypeX8632Attributes[Ty].WidthString; 80 return TypeX8632Attributes[Ty].WidthString;
81 } 81 }
82 82
83 const char *InstX8632::getFldString(Type Ty) { 83 const char *InstX8632::getFldString(Type Ty) {
84 return TypeX8632Attributes[Ty].FldString; 84 return TypeX8632Attributes[Ty].FldString;
85 } 85 }
86 86
87 CondX86::BrCond InstX8632::getOppositeCondition(CondX86::BrCond Cond) {
88 return InstX8632BrAttributes[Cond].Opposite;
89 }
90
87 OperandX8632Mem::OperandX8632Mem(Cfg *Func, Type Ty, Variable *Base, 91 OperandX8632Mem::OperandX8632Mem(Cfg *Func, Type Ty, Variable *Base,
88 Constant *Offset, Variable *Index, 92 Constant *Offset, Variable *Index,
89 uint16_t Shift, SegmentRegisters SegmentReg) 93 uint16_t Shift, SegmentRegisters SegmentReg)
90 : OperandX8632(kMem, Ty), Base(Base), Offset(Offset), Index(Index), 94 : OperandX8632(kMem, Ty), Base(Base), Offset(Offset), Index(Index),
91 Shift(Shift), SegmentReg(SegmentReg) { 95 Shift(Shift), SegmentReg(SegmentReg) {
92 assert(Shift <= 3); 96 assert(Shift <= 3);
93 Vars = nullptr; 97 Vars = nullptr;
94 NumVars = 0; 98 NumVars = 0;
95 if (Base) 99 if (Base)
96 ++NumVars; 100 ++NumVars;
(...skipping 77 matching lines...) Expand 10 before | Expand all | Expand 10 after
174 // to indicate. 178 // to indicate.
175 if (getTargetFalse() == NextNode) { 179 if (getTargetFalse() == NextNode) {
176 TargetFalse = nullptr; 180 TargetFalse = nullptr;
177 return true; 181 return true;
178 } 182 }
179 // If TargetTrue is the next node, and TargetFalse is not nullptr 183 // If TargetTrue is the next node, and TargetFalse is not nullptr
180 // (which was already tested above), then invert the branch 184 // (which was already tested above), then invert the branch
181 // condition, swap the targets, and set new fallthrough to nullptr. 185 // condition, swap the targets, and set new fallthrough to nullptr.
182 if (getTargetTrue() == NextNode) { 186 if (getTargetTrue() == NextNode) {
183 assert(Condition != CondX86::Br_None); 187 assert(Condition != CondX86::Br_None);
184 Condition = InstX8632BrAttributes[Condition].Opposite; 188 Condition = getOppositeCondition(Condition);
185 TargetTrue = getTargetFalse(); 189 TargetTrue = getTargetFalse();
186 TargetFalse = nullptr; 190 TargetFalse = nullptr;
187 return true; 191 return true;
188 } 192 }
189 return false; 193 return false;
190 } 194 }
191 195
192 bool InstX8632Br::repointEdge(CfgNode *OldNode, CfgNode *NewNode) { 196 bool InstX8632Br::repointEdge(CfgNode *OldNode, CfgNode *NewNode) {
193 if (TargetFalse == OldNode) { 197 if (TargetFalse == OldNode) {
194 TargetFalse = NewNode; 198 TargetFalse = NewNode;
(...skipping 1356 matching lines...) Expand 10 before | Expand all | Expand 10 after
1551 << getWidthString(Dest->getType()) << "\t"; 1555 << getWidthString(Dest->getType()) << "\t";
1552 getSrc(1)->emit(Func); 1556 getSrc(1)->emit(Func);
1553 Str << ", "; 1557 Str << ", ";
1554 Dest->emit(Func); 1558 Dest->emit(Func);
1555 } 1559 }
1556 1560
1557 void InstX8632Cmov::emitIAS(const Cfg *Func) const { 1561 void InstX8632Cmov::emitIAS(const Cfg *Func) const {
1558 assert(Condition != CondX86::Br_None); 1562 assert(Condition != CondX86::Br_None);
1559 assert(getDest()->hasReg()); 1563 assert(getDest()->hasReg());
1560 assert(getSrcSize() == 2); 1564 assert(getSrcSize() == 2);
1561 // Only need the reg/reg form now. 1565 Operand *Src = getSrc(1);
1562 const auto SrcVar = llvm::cast<Variable>(getSrc(1)); 1566 Type SrcTy = Src->getType();
1563 assert(SrcVar->hasReg()); 1567 assert(SrcTy == IceType_i16 || SrcTy == IceType_i32);
1564 assert(SrcVar->getType() == IceType_i32);
1565 X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>(); 1568 X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
1566 Asm->cmov(Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()), 1569 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) {
1567 RegX8632::getEncodedGPR(SrcVar->getRegNum())); 1570 if (SrcVar->hasReg()) {
1571 Asm->cmov(SrcTy, Condition,
1572 RegX8632::getEncodedGPR(getDest()->getRegNum()),
1573 RegX8632::getEncodedGPR(SrcVar->getRegNum()));
1574 } else {
1575 Asm->cmov(SrcTy, Condition,
1576 RegX8632::getEncodedGPR(getDest()->getRegNum()),
1577 static_cast<TargetX8632 *>(Func->getTarget())
1578 ->stackVarToAsmOperand(SrcVar));
1579 }
1580 } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
1581 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
1582 Asm->cmov(SrcTy, Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()),
1583 Mem->toAsmAddress(Asm));
1584 } else {
1585 llvm_unreachable("Unexpected operand type");
1586 }
1568 } 1587 }
1569 1588
1570 void InstX8632Cmov::dump(const Cfg *Func) const { 1589 void InstX8632Cmov::dump(const Cfg *Func) const {
1571 if (!ALLOW_DUMP) 1590 if (!ALLOW_DUMP)
1572 return; 1591 return;
1573 Ostream &Str = Func->getContext()->getStrDump(); 1592 Ostream &Str = Func->getContext()->getStrDump();
1574 Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << "."; 1593 Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << ".";
1575 Str << getDest()->getType() << " "; 1594 Str << getDest()->getType() << " ";
1576 dumpDest(Func); 1595 dumpDest(Func);
1577 Str << ", "; 1596 Str << ", ";
(...skipping 1405 matching lines...) Expand 10 before | Expand all | Expand 10 after
2983 } 3002 }
2984 Str << "("; 3003 Str << "(";
2985 if (Func) 3004 if (Func)
2986 Var->dump(Func); 3005 Var->dump(Func);
2987 else 3006 else
2988 Var->dump(Str); 3007 Var->dump(Str);
2989 Str << ")"; 3008 Str << ")";
2990 } 3009 }
2991 3010
2992 } // end of namespace Ice 3011 } // end of namespace Ice
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