| Index: source/libvpx/vp8/encoder/ppc/fdct_altivec.asm
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| diff --git a/source/libvpx/vp8/encoder/ppc/fdct_altivec.asm b/source/libvpx/vp8/encoder/ppc/fdct_altivec.asm
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| deleted file mode 100644
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| index 935d0cb097743755da5a427aef6db9efb16888f4..0000000000000000000000000000000000000000
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| --- a/source/libvpx/vp8/encoder/ppc/fdct_altivec.asm
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| +++ /dev/null
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| @@ -1,205 +0,0 @@
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| -;
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| -; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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| -;
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| -; Use of this source code is governed by a BSD-style license
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| -; that can be found in the LICENSE file in the root of the source
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| -; tree. An additional intellectual property rights grant can be found
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| -; in the file PATENTS. All contributing project authors may
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| -; be found in the AUTHORS file in the root of the source tree.
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| -;
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| -
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| -
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| - .globl vp8_short_fdct4x4_ppc
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| - .globl vp8_short_fdct8x4_ppc
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| -
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| -.macro load_c V, LABEL, OFF, R0, R1
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| - lis \R0, \LABEL@ha
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| - la \R1, \LABEL@l(\R0)
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| - lvx \V, \OFF, \R1
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| -.endm
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| -
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| -;# Forward and inverse DCTs are nearly identical; only differences are
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| -;# in normalization (fwd is twice unitary, inv is half unitary)
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| -;# and that they are of course transposes of each other.
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| -;#
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| -;# The following three accomplish most of implementation and
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| -;# are used only by ppc_idct.c and ppc_fdct.c.
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| -.macro prologue
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| - mfspr r11, 256 ;# get old VRSAVE
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| - oris r12, r11, 0xfffc
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| - mtspr 256, r12 ;# set VRSAVE
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| -
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| - stwu r1,-32(r1) ;# create space on the stack
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| -
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| - li r6, 16
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| -
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| - load_c v0, dct_tab, 0, r9, r10
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| - lvx v1, r6, r10
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| - addi r10, r10, 32
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| - lvx v2, 0, r10
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| - lvx v3, r6, r10
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| -
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| - load_c v4, ppc_dctperm_tab, 0, r9, r10
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| - load_c v5, ppc_dctperm_tab, r6, r9, r10
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| -
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| - load_c v6, round_tab, 0, r10, r9
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| -.endm
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| -
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| -.macro epilogue
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| - addi r1, r1, 32 ;# recover stack
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| -
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| - mtspr 256, r11 ;# reset old VRSAVE
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| -.endm
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| -
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| -;# Do horiz xf on two rows of coeffs v8 = a0 a1 a2 a3 b0 b1 b2 b3.
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| -;# a/A are the even rows 0,2 b/B are the odd rows 1,3
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| -;# For fwd transform, indices are horizontal positions, then frequencies.
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| -;# For inverse transform, frequencies then positions.
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| -;# The two resulting A0..A3 B0..B3 are later combined
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| -;# and vertically transformed.
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| -
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| -.macro two_rows_horiz Dst
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| - vperm v9, v8, v8, v4 ;# v9 = a2 a3 a0 a1 b2 b3 b0 b1
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| -
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| - vmsumshm v10, v0, v8, v6
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| - vmsumshm v10, v1, v9, v10
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| - vsraw v10, v10, v7 ;# v10 = A0 A1 B0 B1
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| -
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| - vmsumshm v11, v2, v8, v6
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| - vmsumshm v11, v3, v9, v11
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| - vsraw v11, v11, v7 ;# v11 = A2 A3 B2 B3
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| -
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| - vpkuwum v10, v10, v11 ;# v10 = A0 A1 B0 B1 A2 A3 B2 B3
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| - vperm \Dst, v10, v10, v5 ;# Dest = A0 B0 A1 B1 A2 B2 A3 B3
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| -.endm
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| -
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| -;# Vertical xf on two rows. DCT values in comments are for inverse transform;
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| -;# forward transform uses transpose.
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| -
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| -.macro two_rows_vert Ceven, Codd
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| - vspltw v8, \Ceven, 0 ;# v8 = c00 c10 or c02 c12 four times
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| - vspltw v9, \Codd, 0 ;# v9 = c20 c30 or c22 c32 ""
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| - vmsumshm v8, v8, v12, v6
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| - vmsumshm v8, v9, v13, v8
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| - vsraw v10, v8, v7
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| -
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| - vspltw v8, \Codd, 1 ;# v8 = c01 c11 or c03 c13
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| - vspltw v9, \Ceven, 1 ;# v9 = c21 c31 or c23 c33
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| - vmsumshm v8, v8, v12, v6
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| - vmsumshm v8, v9, v13, v8
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| - vsraw v8, v8, v7
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| -
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| - vpkuwum v8, v10, v8 ;# v8 = rows 0,1 or 2,3
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| -.endm
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| -
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| -.macro two_rows_h Dest
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| - stw r0, 0(r8)
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| - lwz r0, 4(r3)
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| - stw r0, 4(r8)
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| - lwzux r0, r3,r5
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| - stw r0, 8(r8)
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| - lwz r0, 4(r3)
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| - stw r0, 12(r8)
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| - lvx v8, 0,r8
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| - two_rows_horiz \Dest
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| -.endm
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| -
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| - .align 2
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| -;# r3 short *input
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| -;# r4 short *output
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| -;# r5 int pitch
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| -vp8_short_fdct4x4_ppc:
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| -
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| - prologue
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| -
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| - vspltisw v7, 14 ;# == 14, fits in 5 signed bits
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| - addi r8, r1, 0
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| -
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| -
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| - lwz r0, 0(r3)
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| - two_rows_h v12 ;# v12 = H00 H10 H01 H11 H02 H12 H03 H13
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| -
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| - lwzux r0, r3, r5
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| - two_rows_h v13 ;# v13 = H20 H30 H21 H31 H22 H32 H23 H33
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| -
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| - lvx v6, r6, r9 ;# v6 = Vround
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| - vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
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| -
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| - two_rows_vert v0, v1
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| - stvx v8, 0, r4
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| - two_rows_vert v2, v3
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| - stvx v8, r6, r4
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| -
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| - epilogue
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| -
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| - blr
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| -
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| - .align 2
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| -;# r3 short *input
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| -;# r4 short *output
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| -;# r5 int pitch
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| -vp8_short_fdct8x4_ppc:
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| - prologue
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| -
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| - vspltisw v7, 14 ;# == 14, fits in 5 signed bits
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| - addi r8, r1, 0
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| - addi r10, r3, 0
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| -
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| - lwz r0, 0(r3)
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| - two_rows_h v12 ;# v12 = H00 H10 H01 H11 H02 H12 H03 H13
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| -
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| - lwzux r0, r3, r5
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| - two_rows_h v13 ;# v13 = H20 H30 H21 H31 H22 H32 H23 H33
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| -
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| - lvx v6, r6, r9 ;# v6 = Vround
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| - vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
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| -
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| - two_rows_vert v0, v1
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| - stvx v8, 0, r4
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| - two_rows_vert v2, v3
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| - stvx v8, r6, r4
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| -
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| - ;# Next block
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| - addi r3, r10, 8
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| - addi r4, r4, 32
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| - lvx v6, 0, r9 ;# v6 = Hround
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| -
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| - vspltisw v7, 14 ;# == 14, fits in 5 signed bits
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| - addi r8, r1, 0
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| -
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| - lwz r0, 0(r3)
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| - two_rows_h v12 ;# v12 = H00 H10 H01 H11 H02 H12 H03 H13
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| -
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| - lwzux r0, r3, r5
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| - two_rows_h v13 ;# v13 = H20 H30 H21 H31 H22 H32 H23 H33
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| -
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| - lvx v6, r6, r9 ;# v6 = Vround
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| - vspltisw v7, -16 ;# == 16 == -16, only low 5 bits matter
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| -
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| - two_rows_vert v0, v1
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| - stvx v8, 0, r4
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| - two_rows_vert v2, v3
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| - stvx v8, r6, r4
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| -
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| - epilogue
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| -
|
| - blr
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| -
|
| - .data
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| - .align 4
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| -ppc_dctperm_tab:
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| - .byte 4,5,6,7, 0,1,2,3, 12,13,14,15, 8,9,10,11
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| - .byte 0,1,4,5, 2,3,6,7, 8,9,12,13, 10,11,14,15
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| -
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| - .align 4
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| -dct_tab:
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| - .short 23170, 23170,-12540,-30274, 23170, 23170,-12540,-30274
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| - .short 23170, 23170, 30274, 12540, 23170, 23170, 30274, 12540
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| -
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| - .short 23170,-23170, 30274,-12540, 23170,-23170, 30274,-12540
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| - .short -23170, 23170, 12540,-30274,-23170, 23170, 12540,-30274
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| -
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| - .align 4
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| -round_tab:
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| - .long (1 << (14-1)), (1 << (14-1)), (1 << (14-1)), (1 << (14-1))
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| - .long (1 << (16-1)), (1 << (16-1)), (1 << (16-1)), (1 << (16-1))
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|
|