Implement Smi_bitLength intrinsic on mips, arm, and arm64.

runtime/vm/simulator_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <setjmp.h>  // NOLINT
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
@@ skipping 2402 matching lines @@
       return top / bottom;
     }
   } else {
     const uint32_t utop = static_cast<uint32_t>(top);
     const uint32_t ubottom = static_cast<uint32_t>(bottom);
     return static_cast<int32_t>(utop / ubottom);
   }
 }
 
 
+void Simulator::DecodeMiscDP1Source(Instr* instr) {
+  if (instr->Bit(29) != 0) {
+    UnimplementedInstruction(instr);
+  }
+
+  const Register rd = instr->RdField();
+  const Register rn = instr->RnField();
+  const int op = instr->Bits(10, 10);
+  const int64_t rn_val64 = get_register(rn, R31IsZR);
+  const int32_t rn_val32 = get_wregister(rn, R31IsZR);
+  switch (op) {
+    case 4: {
+      // Format(instr, "clz'sf 'rd, 'rn");
+      int64_t rd_val = 0;
+      int64_t rn_val = (instr->SFField() == 1) ? rn_val64 : rn_val32;
+      if (rn_val != 0) {
+        while (rn_val > 0) {
+          rd_val++;
+          rn_val <<= 1;
+        }
+      } else {
+        rd_val = (instr->SFField() == 1) ? 64 : 32;
+      }
+      if (instr->SFField() == 1) {
+        set_register(instr, rd, rd_val, R31IsZR);
+      } else {
+        set_wregister(rd, rd_val, R31IsZR);
+      }
+      break;
+    }
+    default:
+      UnimplementedInstruction(instr);
+      break;
+  }
+}
+
+
 void Simulator::DecodeMiscDP2Source(Instr* instr) {
   if (instr->Bit(29) != 0) {
     UnimplementedInstruction(instr);
   }
 
   const Register rd = instr->RdField();
   const Register rn = instr->RnField();
   const Register rm = instr->RmField();
-  const int op = instr->Bits(10, 6);
+  const int op = instr->Bits(10, 5);
   const int64_t rn_val64 = get_register(rn, R31IsZR);
   const int64_t rm_val64 = get_register(rm, R31IsZR);
   const int32_t rn_val32 = get_wregister(rn, R31IsZR);
   const int32_t rm_val32 = get_wregister(rm, R31IsZR);
   switch (op) {
     case 2:
     case 3: {
       // Format(instr, "udiv'sf 'rd, 'rn, 'rm");
       // Format(instr, "sdiv'sf 'rd, 'rn, 'rm");
       const bool signd = instr->Bit(10) == 1;
@@ skipping 163 matching lines @@
 }
 
 
 void Simulator::DecodeDPRegister(Instr* instr) {
   if (instr->IsAddSubShiftExtOp()) {
     DecodeAddSubShiftExt(instr);
   } else if (instr->IsAddSubWithCarryOp()) {
     DecodeAddSubWithCarry(instr);
   } else if (instr->IsLogicalShiftOp()) {
     DecodeLogicalShift(instr);
+  } else if (instr->IsMiscDP1SourceOp()) {
+    DecodeMiscDP1Source(instr);
   } else if (instr->IsMiscDP2SourceOp()) {
     DecodeMiscDP2Source(instr);
   } else if (instr->IsMiscDP3SourceOp()) {
     DecodeMiscDP3Source(instr);
   } else if (instr->IsConditionalSelectOp()) {
     DecodeConditionalSelect(instr);
   } else {
     UnimplementedInstruction(instr);
   }
 }
@@ skipping 869 matching lines @@
   set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
   set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM64)
 
 #endif  // defined TARGET_ARCH_ARM64