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Side by Side Diff: runtime/vm/constants_arm64.h

Issue 1124173002: Implement Smi_bitLength intrinsic on mips, arm, and arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 7 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_CONSTANTS_ARM64_H_ 5 #ifndef VM_CONSTANTS_ARM64_H_
6 #define VM_CONSTANTS_ARM64_H_ 6 #define VM_CONSTANTS_ARM64_H_
7 7
8 #include "platform/assert.h" 8 #include "platform/assert.h"
9 9
10 namespace dart { 10 namespace dart {
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431 431
432 // C3.5.6 432 // C3.5.6
433 enum ConditionalSelectOp { 433 enum ConditionalSelectOp {
434 ConditionalSelectMask = 0x1fe00000, 434 ConditionalSelectMask = 0x1fe00000,
435 ConditionalSelectFixed = DPRegisterFixed | B28 | B23, 435 ConditionalSelectFixed = DPRegisterFixed | B28 | B23,
436 CSEL = ConditionalSelectFixed, 436 CSEL = ConditionalSelectFixed,
437 CSINC = ConditionalSelectFixed | B10, 437 CSINC = ConditionalSelectFixed | B10,
438 CSINV = ConditionalSelectFixed | B30, 438 CSINV = ConditionalSelectFixed | B30,
439 }; 439 };
440 440
441 // C3.5.7
442 enum MiscDP1SourceOp {
443 MiscDP1SourceMask = 0x5fe00000,
444 MiscDP1SourceFixed = DPRegisterFixed | B30 | B28 | B23 | B22,
445 CLZ = MiscDP1SourceFixed | B12,
446 };
447
441 // C3.5.8 448 // C3.5.8
442 enum MiscDP2SourceOp { 449 enum MiscDP2SourceOp {
443 MiscDP2SourceMask = 0x5fe00000, 450 MiscDP2SourceMask = 0x5fe00000,
444 MiscDP2SourceFixed = DPRegisterFixed | B28 | B23 | B22, 451 MiscDP2SourceFixed = DPRegisterFixed | B28 | B23 | B22,
445 UDIV = MiscDP2SourceFixed | B11, 452 UDIV = MiscDP2SourceFixed | B11,
446 SDIV = MiscDP2SourceFixed | B11 | B10, 453 SDIV = MiscDP2SourceFixed | B11 | B10,
447 LSLV = MiscDP2SourceFixed | B13, 454 LSLV = MiscDP2SourceFixed | B13,
448 LSRV = MiscDP2SourceFixed | B13 | B10, 455 LSRV = MiscDP2SourceFixed | B13 | B10,
449 ASRV = MiscDP2SourceFixed | B13 | B11, 456 ASRV = MiscDP2SourceFixed | B13 | B11,
450 }; 457 };
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602 _V(LoadStoreReg) \ 609 _V(LoadStoreReg) \
603 _V(LoadStoreRegPair) \ 610 _V(LoadStoreRegPair) \
604 _V(LoadRegLiteral) \ 611 _V(LoadRegLiteral) \
605 _V(AddSubImm) \ 612 _V(AddSubImm) \
606 _V(LogicalImm) \ 613 _V(LogicalImm) \
607 _V(MoveWide) \ 614 _V(MoveWide) \
608 _V(PCRel) \ 615 _V(PCRel) \
609 _V(AddSubShiftExt) \ 616 _V(AddSubShiftExt) \
610 _V(AddSubWithCarry) \ 617 _V(AddSubWithCarry) \
611 _V(ConditionalSelect) \ 618 _V(ConditionalSelect) \
619 _V(MiscDP1Source) \
612 _V(MiscDP2Source) \ 620 _V(MiscDP2Source) \
613 _V(MiscDP3Source) \ 621 _V(MiscDP3Source) \
614 _V(LogicalShift) \ 622 _V(LogicalShift) \
615 _V(SIMDCopy) \ 623 _V(SIMDCopy) \
616 _V(SIMDThreeSame) \ 624 _V(SIMDThreeSame) \
617 _V(SIMDTwoReg) \ 625 _V(SIMDTwoReg) \
618 _V(FPCompare) \ 626 _V(FPCompare) \
619 _V(FPOneSource) \ 627 _V(FPOneSource) \
620 _V(FPTwoSource) \ 628 _V(FPTwoSource) \
621 _V(FPImm) \ 629 _V(FPImm) \
(...skipping 437 matching lines...) Expand 10 before | Expand all | Expand 10 after
1059 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } 1067 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
1060 1068
1061 private: 1069 private:
1062 DISALLOW_ALLOCATION(); 1070 DISALLOW_ALLOCATION();
1063 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 1071 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
1064 }; 1072 };
1065 1073
1066 } // namespace dart 1074 } // namespace dart
1067 1075
1068 #endif // VM_CONSTANTS_ARM64_H_ 1076 #endif // VM_CONSTANTS_ARM64_H_
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