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1 // Copyright 2014 The Chromium Authors. All rights reserved. | 1 // Copyright 2014 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // Multiply-included message file, hence no include guard here, but see below | 5 // Multiply-included message file, hence no include guard here, but see below |
6 // for a much smaller-than-usual include guard section. | 6 // for a much smaller-than-usual include guard section. |
7 | 7 |
8 #include <vector> | 8 #include <vector> |
9 | 9 |
10 #include "base/file_descriptor_posix.h" | 10 #include "base/file_descriptor_posix.h" |
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100 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_DisableNativeDisplay, | 100 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_DisableNativeDisplay, |
101 int64_t) // display ID | 101 int64_t) // display ID |
102 | 102 |
103 IPC_MESSAGE_CONTROL2(OzoneGpuMsg_AddGraphicsDevice, | 103 IPC_MESSAGE_CONTROL2(OzoneGpuMsg_AddGraphicsDevice, |
104 base::FilePath /* device_path */, | 104 base::FilePath /* device_path */, |
105 base::FileDescriptor /* device_fd */) | 105 base::FileDescriptor /* device_fd */) |
106 | 106 |
107 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_RemoveGraphicsDevice, | 107 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_RemoveGraphicsDevice, |
108 base::FilePath /* device_path */) | 108 base::FilePath /* device_path */) |
109 | 109 |
| 110 IPC_MESSAGE_CONTROL2(OzoneGpuMsg_AddVgemDevice, |
| 111 base::FilePath /* device_path */, |
| 112 base::FileDescriptor /* device_fd */) |
| 113 |
110 // Take control of the display | 114 // Take control of the display |
111 IPC_MESSAGE_CONTROL0(OzoneGpuMsg_TakeDisplayControl) | 115 IPC_MESSAGE_CONTROL0(OzoneGpuMsg_TakeDisplayControl) |
112 | 116 |
113 // Let other entity control the display | 117 // Let other entity control the display |
114 IPC_MESSAGE_CONTROL0(OzoneGpuMsg_RelinquishDisplayControl) | 118 IPC_MESSAGE_CONTROL0(OzoneGpuMsg_RelinquishDisplayControl) |
115 | 119 |
116 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_GetHDCPState, int64_t /* display_id */) | 120 IPC_MESSAGE_CONTROL1(OzoneGpuMsg_GetHDCPState, int64_t /* display_id */) |
117 | 121 |
118 IPC_MESSAGE_CONTROL2(OzoneGpuMsg_SetHDCPState, | 122 IPC_MESSAGE_CONTROL2(OzoneGpuMsg_SetHDCPState, |
119 int64_t /* display_id */, | 123 int64_t /* display_id */, |
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139 // Response for OzoneGpuMsg_GetHDCPState. | 143 // Response for OzoneGpuMsg_GetHDCPState. |
140 IPC_MESSAGE_CONTROL3(OzoneHostMsg_HDCPStateReceived, | 144 IPC_MESSAGE_CONTROL3(OzoneHostMsg_HDCPStateReceived, |
141 int64_t /* display_id */, | 145 int64_t /* display_id */, |
142 bool /* success */, | 146 bool /* success */, |
143 ui::HDCPState /* state */) | 147 ui::HDCPState /* state */) |
144 | 148 |
145 // Response for OzoneGpuMsg_SetHDCPState. | 149 // Response for OzoneGpuMsg_SetHDCPState. |
146 IPC_MESSAGE_CONTROL2(OzoneHostMsg_HDCPStateUpdated, | 150 IPC_MESSAGE_CONTROL2(OzoneHostMsg_HDCPStateUpdated, |
147 int64_t /* display_id */, | 151 int64_t /* display_id */, |
148 bool /* success */) | 152 bool /* success */) |
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