MIPS [turbofan]: Improve fpu branch assembling for unordered conditions.

src/compiler/mips64/code-generator-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/mips/macro-assembler-mips.h"
 #include "src/scopes.h"
@@ skipping 879 matching lines @@
       break;
   }
 }
 
 
 #define UNSUPPORTED_COND(opcode, condition)                                  \
   OFStream out(stdout);                                                      \
   out << "Unsupported " << #opcode << " condition: \"" << condition << "\""; \
   UNIMPLEMENTED();
 
-static bool convertCondition(FlagsCondition condition, Condition& cc,
-                             bool& acceptNaN) {
-  acceptNaN = false;
+static bool convertCondition(FlagsCondition condition, Condition& cc) {
   switch (condition) {
     case kEqual:
       cc = eq;
       return true;
     case kNotEqual:
       cc = ne;
-      acceptNaN = true;
       return true;
     case kUnsignedLessThan:
       cc = lt;
       return true;
     case kUnsignedGreaterThanOrEqual:
-      cc = ge;
-      acceptNaN = true;
+      cc = uge;
       return true;
     case kUnsignedLessThanOrEqual:
       cc = le;
       return true;
     case kUnsignedGreaterThan:
-      cc = gt;
-      acceptNaN = true;
+      cc = ugt;
       return true;
     default:
       break;
   }
   return false;
 }
 
 
 // Assembles branches after an instruction.
 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
@@ skipping 19 matching lines @@
 
     __ dsra32(kScratchReg, i.OutputRegister(), 0);
     __ sra(at, i.OutputRegister(), 31);
     __ Branch(tlabel, cc, at, Operand(kScratchReg));
   } else if (instr->arch_opcode() == kMips64Cmp) {
     cc = FlagsConditionToConditionCmp(branch->condition);
     __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
   } else if (instr->arch_opcode() == kMips64CmpS) {
-    // TODO(dusmil) optimize unordered checks to use fewer instructions
-    // even if we have to unfold BranchF macro.
-    bool acceptNaN = false;
-    if (!convertCondition(branch->condition, cc, acceptNaN)) {
+    if (!convertCondition(branch->condition, cc)) {
       UNSUPPORTED_COND(kMips64CmpS, branch->condition);
     }
-    Label* nan = acceptNaN ? tlabel : flabel;
-    __ BranchF32(tlabel, nan, cc, i.InputSingleRegister(0),
+    __ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
                  i.InputSingleRegister(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
 
   } else if (instr->arch_opcode() == kMips64CmpD) {
-    // TODO(dusmil) optimize unordered checks to use less instructions
-    // even if we have to unfold BranchF macro.
-    bool acceptNaN = false;
-    if (!convertCondition(branch->condition, cc, acceptNaN)) {
+    if (!convertCondition(branch->condition, cc)) {
       UNSUPPORTED_COND(kMips64CmpD, branch->condition);
     }
-    Label* nan = acceptNaN ? tlabel : flabel;
-    __ BranchF64(tlabel, nan, cc, i.InputDoubleRegister(0),
+    __ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
                  i.InputDoubleRegister(1));
 
     if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
   } else {
     PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
            instr->arch_opcode());
     UNIMPLEMENTED();
   }
 }
 
@@ skipping 408 matching lines @@
     }
   }
   MarkLazyDeoptSite();
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8