Mark instruction blocks with spills (for frame elision).

src/compiler/pipeline.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/pipeline.h"
 
 #include <fstream>  // NOLINT(readability/streams)
 #include <sstream>
 
 #include "src/base/adapters.h"
@@ skipping 761 matching lines @@
   static const char* phase_name() { return "allocate double registers"; }
 
   void Run(PipelineData* data, Zone* temp_zone) {
     RegAllocator allocator(data->register_allocation_data(), DOUBLE_REGISTERS,
                            temp_zone);
     allocator.AllocateRegisters();
   }
 };
 
 
+struct LocateSpillSlotsPhase {
+  static const char* phase_name() { return "locate spill slots"; }
+
+  void Run(PipelineData* data, Zone* temp_zone) {
+    SpillSlotLocator locator(data->register_allocation_data());
+    locator.LocateSpillSlots();
+  }
+};
+
+
 struct AssignSpillSlotsPhase {
   static const char* phase_name() { return "assign spill slots"; }
 
   void Run(PipelineData* data, Zone* temp_zone) {
     OperandAssigner assigner(data->register_allocation_data());
     assigner.AssignSpillSlots();
   }
 };
 
 
@@ skipping 401 matching lines @@
   BeginPhaseKind("register allocation");
 
   bool run_verifier = FLAG_turbo_verify_allocation;
   // Allocate registers.
   AllocateRegisters(RegisterConfiguration::ArchDefault(), run_verifier);
   if (data->compilation_failed()) {
     info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc);
     return Handle<Code>();
   }
 
-  if (FLAG_turbo_frame_elision) {
-    Run<FrameElisionPhase>();
-  }
-
   BeginPhaseKind("code generation");
 
   // Optimimize jumps.
   if (FLAG_turbo_jt) {
     Run<JumpThreadingPhase>();
   }
 
   // Generate final machine code.
   Run<GenerateCodePhase>(&linkage);
 
@@ skipping 75 matching lines @@
   if (verifier != nullptr) {
     CHECK(!data->register_allocation_data()->ExistsUseWithoutDefinition());
   }
   if (FLAG_turbo_greedy_regalloc) {
     Run<AllocateGeneralRegistersPhase<GreedyAllocator>>();
     Run<AllocateDoubleRegistersPhase<GreedyAllocator>>();
   } else {
     Run<AllocateGeneralRegistersPhase<LinearScanAllocator>>();
     Run<AllocateDoubleRegistersPhase<LinearScanAllocator>>();
   }
+
+  if (FLAG_turbo_frame_elision) {
+    Run<LocateSpillSlotsPhase>();
+    Run<FrameElisionPhase>();
+  }
+
   Run<AssignSpillSlotsPhase>();
 
   Run<CommitAssignmentPhase>();
   Run<PopulateReferenceMapsPhase>();
   Run<ConnectRangesPhase>();
   Run<ResolveControlFlowPhase>();
   if (FLAG_turbo_move_optimization) {
     Run<OptimizeMovesPhase>();
   }
 
@@ skipping 14 matching lines @@
     tcf << AsC1VRegisterAllocationData("CodeGen",
                                        data->register_allocation_data());
   }
 
   data->DeleteRegisterAllocationZone();
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8