Revert of [turbofan] add MachineType to AllocatedOperand

src/compiler/register-allocator.h

Index: src/compiler/register-allocator.h
diff --git a/src/compiler/register-allocator.h b/src/compiler/register-allocator.h
index 41f00af2d5f0035590939113600add1f59ebdf90..50b89ede055b78db461794d25578b67625ba5685 100644
--- a/src/compiler/register-allocator.h
+++ b/src/compiler/register-allocator.h
@@ -13,6 +13,7 @@
 namespace compiler {
 
 enum RegisterKind {
+  UNALLOCATED_REGISTERS,
   GENERAL_REGISTERS,
   DOUBLE_REGISTERS
 };
@@ -271,7 +272,7 @@
 // intervals over the instruction ordering.
 class LiveRange final : public ZoneObject {
  public:
-  explicit LiveRange(int id, MachineType machine_type);
+  explicit LiveRange(int id);
 
   UseInterval* first_interval() const { return first_interval_; }
   UsePosition* first_pos() const { return first_pos_; }
@@ -288,8 +289,6 @@
   InstructionOperand GetAssignedOperand() const;
   int spill_start_index() const { return spill_start_index_; }
 
-  MachineType machine_type() const { return MachineTypeField::decode(bits_); }
-
   int assigned_register() const { return AssignedRegisterField::decode(bits_); }
   bool HasRegisterAssigned() const {
     return assigned_register() != kUnassignedRegister;
@@ -300,7 +299,10 @@
   bool spilled() const { return SpilledField::decode(bits_); }
   void Spill();
 
-  RegisterKind kind() const;
+  RegisterKind kind() const { return RegisterKindField::decode(bits_); }
+  void set_kind(RegisterKind kind) {
+    bits_ = RegisterKindField::update(bits_, kind);
+  }
 
   // Correct only for parent.
   bool is_phi() const { return IsPhiField::decode(bits_); }
@@ -384,14 +386,14 @@
     return spill_type() == SpillType::kSpillOperand;
   }
   bool HasSpillRange() const { return spill_type() == SpillType::kSpillRange; }
-  AllocatedOperand GetSpillRangeOperand() const;
 
   void SpillAtDefinition(Zone* zone, int gap_index,
                          InstructionOperand* operand);
   void SetSpillOperand(InstructionOperand* operand);
   void SetSpillRange(SpillRange* spill_range);
+  void CommitSpillOperand(AllocatedOperand* operand);
   void CommitSpillsAtDefinition(InstructionSequence* sequence,
-                                const InstructionOperand& operand,
+                                InstructionOperand* operand,
                                 bool might_be_duplicated);
 
   void SetSpillStartIndex(int start) {
@@ -414,7 +416,7 @@
   void Verify() const;
 
   void ConvertUsesToOperand(const InstructionOperand& op,
-                            const InstructionOperand& spill_op);
+                            InstructionOperand* spill_op);
   void SetUseHints(int register_index);
   void UnsetUseHints() { SetUseHints(kUnassignedRegister); }
 
@@ -435,9 +437,9 @@
   typedef BitField<bool, 1, 1> HasSlotUseField;
   typedef BitField<bool, 2, 1> IsPhiField;
   typedef BitField<bool, 3, 1> IsNonLoopPhiField;
-  typedef BitField<SpillType, 4, 2> SpillTypeField;
-  typedef BitField<int32_t, 6, 6> AssignedRegisterField;
-  typedef BitField<MachineType, 12, 15> MachineTypeField;
+  typedef BitField<RegisterKind, 4, 2> RegisterKindField;
+  typedef BitField<SpillType, 6, 2> SpillTypeField;
+  typedef BitField<int32_t, 8, 6> AssignedRegisterField;
 
   int id_;
   int spill_start_index_;
@@ -466,23 +468,13 @@
 
 class SpillRange final : public ZoneObject {
  public:
-  static const int kUnassignedSlot = -1;
   SpillRange(LiveRange* range, Zone* zone);
 
   UseInterval* interval() const { return use_interval_; }
-  // Currently, only 4 or 8 byte slots are supported.
-  int ByteWidth() const;
+  RegisterKind kind() const { return live_ranges_[0]->kind(); }
   bool IsEmpty() const { return live_ranges_.empty(); }
   bool TryMerge(SpillRange* other);
-
-  void set_assigned_slot(int index) {
-    DCHECK_EQ(kUnassignedSlot, assigned_slot_);
-    assigned_slot_ = index;
-  }
-  int assigned_slot() {
-    DCHECK_NE(kUnassignedSlot, assigned_slot_);
-    return assigned_slot_;
-  }
+  void SetOperand(AllocatedOperand* op);
 
  private:
   LifetimePosition End() const { return end_position_; }
@@ -494,7 +486,6 @@
   ZoneVector<LiveRange*> live_ranges_;
   UseInterval* use_interval_;
   LifetimePosition end_position_;
-  int assigned_slot_;
 
   DISALLOW_COPY_AND_ASSIGN(SpillRange);
 };
@@ -558,12 +549,7 @@
   const char* debug_name() const { return debug_name_; }
   const RegisterConfiguration* config() const { return config_; }
 
-  MachineType MachineTypeFor(int virtual_register);
-
   LiveRange* LiveRangeFor(int index);
-  // Creates a new live range.
-  LiveRange* NewLiveRange(int index, MachineType machine_type);
-  LiveRange* NewChildRangeFor(LiveRange* range);
 
   SpillRange* AssignSpillRangeToLiveRange(LiveRange* range);
 
@@ -576,6 +562,9 @@
   }
 
   bool ExistsUseWithoutDefinition();
+
+  // Creates a new live range.
+  LiveRange* NewLiveRange(int index);
 
   void MarkAllocated(RegisterKind kind, int index);
 
@@ -597,7 +586,6 @@
   ZoneVector<SpillRange*> spill_ranges_;
   BitVector* assigned_registers_;
   BitVector* assigned_double_registers_;
-  int virtual_register_count_;
 
   DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData);
 };
@@ -675,6 +663,9 @@
 
   void MapPhiHint(InstructionOperand* operand, UsePosition* use_pos);
   void ResolvePhiHint(InstructionOperand* operand, UsePosition* use_pos);
+
+  // Returns the register kind required by the given virtual register.
+  RegisterKind RequiredRegisterKind(int virtual_register) const;
 
   UsePosition* NewUsePosition(LifetimePosition pos, InstructionOperand* operand,
                               void* hint, UsePositionHintType hint_type);