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Issue 11194045: Change BKPT and UDF encodings on ARM. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client
Patch Set: Update copyright. Created 8 years, 1 month ago
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1 /* 1 /*
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be 3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file. 4 * found in the LICENSE file.
5 */ 5 */
6 6
7 #ifndef NACL_TRUSTED_BUT_NOT_TCB 7 #ifndef NACL_TRUSTED_BUT_NOT_TCB
8 #error This file is not meant for use in the TCB 8 #error This file is not meant for use in the TCB
9 #endif 9 #endif
10 10
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114 // cccc 0001 0010 1111 1111 1111 00L1 mmmm 114 // cccc 0001 0010 1111 1111 1111 00L1 mmmm
115 ((i & 0x0FFFFFD0) == 0x012FFF10); 115 ((i & 0x0FFFFFD0) == 0x012FFF10);
116 uint32_t expected_branch_target = !expect_b_or_bl ? 116 uint32_t expected_branch_target = !expect_b_or_bl ?
117 kDefaultBaseAddr : 117 kDefaultBaseAddr :
118 // imm32 = SignExtend(imm24:'00', 32); 118 // imm32 = SignExtend(imm24:'00', 32);
119 // PC reads as the address of the current instruction plus 8. 119 // PC reads as the address of the current instruction plus 8.
120 (kDefaultBaseAddr + 8 + (((int32_t)i << 8) >> 6)); 120 (kDefaultBaseAddr + 8 + (((int32_t)i << 8) >> 6));
121 uint32_t expected_branch_target_register = expect_bx_or_blx ? 121 uint32_t expected_branch_target_register = expect_bx_or_blx ?
122 (i & 0xF) : // When present, always Rm(3:0). 122 (i & 0xF) : // When present, always Rm(3:0).
123 nacl_arm_dec::Register::kNone; 123 nacl_arm_dec::Register::kNone;
124 bool expect_literal_pool_head = 124 bool expect_literal_pool_head =(i == nacl_arm_dec::kLiteralPoolHead);
125 (i == nacl_arm_dec::kLiteralPoolHeadInstruction);
126 bool expect_load_store_or_unsafe = expect_unconditional ? 125 bool expect_load_store_or_unsafe = expect_unconditional ?
127 // Advanced SIMD element or structure load/store instructions. 126 // Advanced SIMD element or structure load/store instructions.
128 // 1111 0100 xx0x xxxx xxxx xxxx xxxx xxxx 127 // 1111 0100 xx0x xxxx xxxx xxxx xxxx xxxx
129 ((i & 0x0F100000) == 0x04000000) : 128 ((i & 0x0F100000) == 0x04000000) :
130 ( // Conditional instructions: 129 ( // Conditional instructions:
131 // Synchronization primitives. 130 // Synchronization primitives.
132 // cccc 0001 xxxx xxxx xxxx xxxx 1001 xxxx 131 // cccc 0001 xxxx xxxx xxxx xxxx 1001 xxxx
133 ((i & 0x0F0000F0) == 0x01000090) || 132 ((i & 0x0F0000F0) == 0x01000090) ||
134 // Extra load/store instructions[, unprivileged]. 133 // Extra load/store instructions[, unprivileged].
135 // cccc 000x xxxx xxxx xxxx xxxx 1011 xxxx 134 // cccc 000x xxxx xxxx xxxx xxxx 1011 xxxx
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263 } while (i++ != last_i); 262 } while (i++ != last_i);
264 } 263 }
265 264
266 } // anonymous namespace 265 } // anonymous namespace
267 266
268 // Test driver function. 267 // Test driver function.
269 int main(int argc, char *argv[]) { 268 int main(int argc, char *argv[]) {
270 testing::InitGoogleTest(&argc, argv); 269 testing::InitGoogleTest(&argc, argv);
271 return RUN_ALL_TESTS(); 270 return RUN_ALL_TESTS();
272 } 271 }
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